abhinavputhran
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ec54c36850
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dfflibmap: pass selection to dfflegalize dfflibmap was calling dfflegalize on the whole design regardless of the active selection, causing unselected modules to be modified. Fix by appending selected module names to the dfflegalize command. Fixes #5650
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2026-03-06 15:13:04 -05:00 |
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Emil J
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04113eb95d
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Merge pull request #5714 from likeamahoney/auto-proc-vars
support automatic lifetime qualifier on procedural variables
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2026-03-03 17:31:37 +01:00 |
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KrystalDelusion
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1d3f9b7905
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Merge pull request #5687 from YosysHQ/nella/pdr-doc
Update help text for rename -witness and write_aiger -ywmap
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2026-03-02 09:29:25 +13:00 |
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likeamahoney
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e9442194f2
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support automatic lifetime qualifier on procedural variables
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2026-02-27 20:42:52 +03:00 |
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Miodrag Milanović
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687a36af38
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Merge pull request #5711 from YosysHQ/gowin_warning
gowin: remove spurious warning
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2026-02-27 14:04:27 +01:00 |
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Miodrag Milanovic
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7f1f247c56
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gowin: remove spurious warning
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2026-02-27 13:12:32 +01:00 |
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Miodrag Milanović
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2dd71c3ba2
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Merge pull request #5709 from YosysHQ/update_abc
Update ABC as per 2026-02-27
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2026-02-27 08:32:34 +01:00 |
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Miodrag Milanovic
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b3caec1a93
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Update ABC as per 2026-02-27
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2026-02-27 07:55:34 +01:00 |
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nella
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2c52546e2a
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Fix docs.
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2026-02-25 16:42:05 +01:00 |
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Emil J
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5f8489d36d
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Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors
equiv_induct: error on missing model
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2026-02-25 15:39:31 +01:00 |
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Miodrag Milanović
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fd1ac58767
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Merge pull request #5706 from YosysHQ/remove-flake-lock
Remove already disabled CI job
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2026-02-25 11:15:33 +01:00 |
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Miodrag Milanovic
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31f7d0d92d
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Remove already disabled CI job
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2026-02-25 10:36:46 +01:00 |
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Miodrag Milanović
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53d8eb43ff
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Merge pull request #5702 from YosysHQ/verific_build_all
Check verific configurations
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2026-02-23 09:41:59 +01:00 |
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Miodrag Milanovic
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b51110a50b
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Build various Verific configurations
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2026-02-23 09:01:55 +01:00 |
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Krystine Sherwin
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fd311c5501
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tests/arch/gowin: Add wr_en test
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2026-02-22 09:00:37 +01:00 |
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Krystine Sherwin
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2386923b8f
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gowin: Fix bram ADA byte enables
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2026-02-22 09:00:37 +01:00 |
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Miodrag Milanović
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fb653c4181
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Merge pull request #5700 from YosysHQ/wasi_speedup
CI: WASI - Applying YoWASP changes to script
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2026-02-20 18:00:24 +01:00 |
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Miodrag Milanovic
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68e47ebcfe
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CI: WASI - Applying YoWASP changes to script
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2026-02-20 15:23:45 +01:00 |
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Miodrag Milanović
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0ed7c5ad53
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Merge pull request #5620 from YosysHQ/lofty/abc9-verify
abc9: verify post-mapping equivalence by default
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2026-02-20 13:41:11 +01:00 |
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Krystine Sherwin
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094481739f
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memory_libmap: Add -force-params
Reduce complexity for adi brams by unconditionally providing the WIDTH and ABITS parameters.
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2026-02-20 10:57:00 +00:00 |
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Emil J
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13795203a1
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Merge pull request #5680 from YosysHQ/emi/aiger-add-bounds-checks
aigerparse: add some bounds checks
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2026-02-20 11:53:49 +01:00 |
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Emil J
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74f7b0cf92
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Merge pull request #5685 from chathhorn-galois/chathhorn/issue5684
Fix segfault from shift with 0-width signed arg.
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2026-02-20 11:53:05 +01:00 |
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Emil J
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53509a9b2a
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Merge pull request #5692 from YosysHQ/emil/modtools-fix-db-port-deletion
modtools: fix database sanity
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2026-02-20 10:49:28 +01:00 |
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Miodrag Milanović
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679156d323
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Merge pull request #5686 from YosysHQ/version_bump
Automatic version bump
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2026-02-19 09:52:22 +01:00 |
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Emil J. Tywoniak
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abc7563a35
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modtools: add ModIndex unit test
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2026-02-18 22:15:44 +01:00 |
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Emil J. Tywoniak
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c75d80905a
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modtools: fix database sanity on wire name swap
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2026-02-18 21:23:21 +01:00 |
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Gus Smith
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29a270c4b6
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Merge pull request #5675 from rowanG077/add-missing-celledges
kernel/celledges: cover more cell types
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2026-02-18 07:50:41 -08:00 |
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Miodrag Milanovic
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5bb31485b7
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Display repo and branch when applicable
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2026-02-18 13:34:36 +01:00 |
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Emil J. Tywoniak
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62f19cb3a9
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modtools: fix port_del db erase
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2026-02-18 12:20:36 +01:00 |
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Emil J
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33a2de9635
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Merge pull request #5681 from YosysHQ/emil/blifparse-bounds-check
blifparse: add bounds check
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2026-02-18 12:18:05 +01:00 |
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nella
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01e89a8f9e
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Remove cell mentions.
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2026-02-18 09:29:35 +01:00 |
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nella
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2b4f481850
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Cleanup docs.
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2026-02-18 09:24:41 +01:00 |
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Emil J. Tywoniak
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77f64de997
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satgen: move report_missing_model here from equiv.h
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2026-02-16 17:01:09 +01:00 |
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Emil J. Tywoniak
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81ea922512
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sat: use the same cell import warnings as equiv
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2026-02-16 16:54:26 +01:00 |
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Miodrag Milanovic
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63068f9b8f
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count relative to version tag, and ignore non existing
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2026-02-16 16:44:33 +01:00 |
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nella
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e6e57b33e3
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document abc --keep-going pdr [sc-220].
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2026-02-15 09:00:04 +01:00 |
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Miodrag Milanović
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ac96f318ef
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Merge pull request #5676 from YosysHQ/emil/unit-test-by-default
Run unit tests on make test
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2026-02-13 15:02:50 +01:00 |
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Miodrag Milanovic
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0090aa96b6
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Remove version bump action
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2026-02-13 14:22:33 +01:00 |
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Miodrag Milanovic
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adf8b6b0d8
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Add +post to version if from tarbal
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2026-02-13 14:22:10 +01:00 |
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Miodrag Milanovic
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c7d88ded94
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Make version bump automatic
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2026-02-13 14:21:41 +01:00 |
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Chris Hathhorn
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1e852cef16
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Fix segfault from shift with 0-width signed arg.
Fixes #5684.
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2026-02-12 22:03:42 -06:00 |
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github-actions[bot]
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e2f0c4d9a0
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Bump version
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2026-02-13 00:35:27 +00:00 |
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Miodrag Milanovic
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bb7aa7d208
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Cleanup of yml files
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2026-02-12 14:56:45 +01:00 |
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Miodrag Milanović
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e4b32d6aae
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Merge pull request #5670 from max-kudinov/gowin_mult
Gowin: Add DSP inference for GW1N and GW2A
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2026-02-12 14:30:27 +01:00 |
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Miodrag Milanovic
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e5b3e9fc1f
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This one should run only vanilla-tests
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2026-02-12 14:08:49 +01:00 |
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Miodrag Milanovic
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c6e48f4bea
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These are tests from other Makefile
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2026-02-12 14:06:08 +01:00 |
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Miodrag Milanovic
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cc79c6a761
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Support building out of tree, but keep always in tests/unit
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2026-02-12 12:17:07 +01:00 |
|
Maxim Kudinov
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b055ea05fd
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gowin: dsp: Add mult inference tests
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2026-02-12 14:12:32 +03:00 |
|
Maxim Kudinov
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5b94a97fb3
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gowin: synth_gowin: Add -nodsp option
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2026-02-12 13:58:47 +03:00 |
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Maxim Kudinov
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542b29fa6a
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gowin: synth_gowin: Merge flatten label with coarse
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2026-02-12 13:58:47 +03:00 |
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