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Author	SHA1	Message	Date
Emil J. Tywoniak	4bf3677640	techmap: set Han-Carlson adder priority consistent with Kogge-Stone	2024-11-28 23:54:00 +01:00
Emil J. Tywoniak	3f078d9afa	tests: rework Kogge-Stone test consistently with Han-Carlson	2024-11-28 15:33:21 +01:00
Emil J. Tywoniak	1a562f9605	techmap: add TCL test for Han-Carlson adder	2024-11-28 15:33:21 +01:00
Emil J. Tywoniak	289673a807	tests: add support for tcl tests	2024-11-28 15:33:21 +01:00
Emil J. Tywoniak	6c78bd3637	techmap: add a Han-Carlson option for $lcu mapping	2024-11-28 15:33:21 +01:00
Alain Dargelas	e5e596149b	Remove abc option ambiguity	2024-11-27 21:31:14 -08:00
KrystalDelusion	6f3376cbe6	Merge pull request #4730 from YosysHQ/krys/downstream-docs ... Improvements for downstream-distro maintainability.	2024-11-28 14:35:16 +13:00
github-actions[bot]	87742fa688	Bump version	2024-11-28 01:26:26 +00:00
Martin Povišer	646c5a19a8	Merge pull request #4776 from YosysHQ/krys/get_blackbox_attribute ... Move get_blackbox_attribute method to Module instead of AttrObject	2024-11-28 00:25:16 +01:00
Martin Povišer	1717a0b9c0	Merge pull request #4721 from ldoolitt/main ... kernel/drivertools.h: avoid maybe-uninitialized compile warnings	2024-11-28 00:09:43 +01:00
Martin Povišer	956313efe8	Merge pull request #4742 from YosysHQ/hierarchy_notify_top_attr ... Print a note about finding attribute (* top *) in hierarchy	2024-11-28 00:07:18 +01:00
Martin Povišer	3bab837bc9	Merge pull request #4765 from georgerennie/george/rtlil_case_rule ... read_rtlil: Warn on assigns after switches in case rules	2024-11-28 00:01:21 +01:00
KrystalDelusion	698c464109	Merge pull request #4767 from YosysHQ/krys/latest-compilers ... test-compile: Use newer clang and gcc versions	2024-11-28 11:51:38 +13:00
KrystalDelusion	f428163252	Move get_blackbox_attribute method to Module instead of AttrObject	2024-11-28 11:19:16 +13:00
Martin Povišer	2962f8fa88	techmap: Add -dont_map for selective disabling of rules	2024-11-27 15:54:37 +01:00
Martin Povišer	79e9258a31	wrapcell: Add new command	2024-11-27 14:01:00 +01:00
Pepijn de Vos	be836f4af3	gowin: split cells_xtra by family	2024-11-26 15:42:22 +01:00
Emil J. Tywoniak	65146e3acf	driver: add --autoidx	2024-11-26 12:11:10 +01:00
Alain Dargelas	b421ffa3c4	typo in unused flow	2024-11-25 20:19:09 -08:00
Alain Dargelas	c0c0d9c559	Help and comments	2024-11-25 20:04:13 -08:00
Alain Dargelas	cd15e211b7	Makefile	2024-11-25 19:37:26 -08:00
github-actions[bot]	98b4affc4a	Bump version	2024-11-26 01:25:27 +00:00
Alain Dargelas	e9b7db0a4a	Selective boolopt	2024-11-25 15:22:16 -08:00
Alain Dargelas	b2587f5e68	Selective boolopt	2024-11-25 15:19:35 -08:00
Alain Dargelas	e8e25b4cea	Selective boolopt	2024-11-25 15:18:22 -08:00
Alain Dargelas	10bad88bdb	Selective boolopt	2024-11-25 15:15:35 -08:00
Alain Dargelas	13915dee96	Selective boolopt	2024-11-25 15:14:14 -08:00
Alain Dargelas	cec4302ac4	Selective boolopt	2024-11-25 15:10:52 -08:00
Alain Dargelas	c32d0a412c	Selective boolopt	2024-11-25 15:08:42 -08:00
KrystalDelusion	1e0e367aed	test-compile: Drop back to gcc-13	2024-11-26 10:18:09 +13:00
KrystalDelusion	6ff5823d6a	test-compile: Use clang-18 and gcc-14 ... The 'newest' compilers are actually not all that new, they're just the default for the image. Instead provide explicit versions.	2024-11-26 09:59:52 +13:00
Akash Levy	e9b0f73cb3	Add blackbox to SMALL	2024-11-25 07:07:18 -08:00
Miodrag Milanović	29e8812bab	Merge pull request #4724 from YosysHQ/micko/blackbox_verific ... verific: fix blackbox regression and add test case	2024-11-25 15:06:54 +01:00
Miodrag Milanović	9512ec4bbc	Merge pull request #4764 from YosysHQ/micko/verific_vhdl_assert ... verific : VHDL assert DFF initial value set on Verific library patch	2024-11-25 15:06:36 +01:00
Akash Levy	c3d6821f7d	Removing compiler warnings and errors	2024-11-22 20:04:39 -08:00
George Rennie	8148ebd1ad	docs: document that assigns must come before switches in case rules	2024-11-21 22:41:13 +01:00
George Rennie	4a057b3c44	read_rtlil: warn on assigns after switches in case rules	2024-11-21 22:41:13 +01:00
Akash Levy	70f7778560	Merge pull request #27 from alaindargelas/main ... Loop info	2024-11-21 11:31:55 -08:00
Alain Dargelas	97f5ef2056	indent	2024-11-21 11:31:36 -08:00
Alain Dargelas	dc9d61ed61	Loop info	2024-11-21 11:24:00 -08:00
Alain Dargelas	179bd25235	Loop info	2024-11-21 11:23:13 -08:00
Alain Dargelas	dde6a8d8f1	Loop info	2024-11-21 11:20:40 -08:00
Akash Levy	a6874db257	Update Yosys	2024-11-21 10:58:17 -08:00
Miodrag Milanovic	d6bd521487	verific : VHDL assert DFF initial value set on Verific library patch side	2024-11-21 13:43:26 +01:00
Akash Levy	52a1493548	Naming improvements	2024-11-21 03:29:35 -08:00
Akash Levy	f855b39dbb	Merge branch 'YosysHQ:main' into main	2024-11-21 00:34:49 -08:00
Akash Levy	519789be09	Update Verific	2024-11-20 22:26:10 -08:00
Akash Levy	bbbc292209	Smallfixes	2024-11-20 21:10:58 -08:00
Akash Levy	08ff023510	Naming fix for ff.cc	2024-11-20 20:59:04 -08:00
Akash Levy	b9456acdd1	Remove unused and_cell	2024-11-20 20:36:39 -08:00