Dag Lem
26db5a11d3
Resolve struct member package types
2023-01-29 13:51:44 -05:00
Dag Lem
db13c6df2b
Handle struct members of union type ( #3641 )
2023-01-29 13:45:45 -05:00
Miodrag Milanovic
6574553189
Fixes for some of clang scan-build detected issues
2023-01-17 12:58:08 +01:00
N. Engelhardt
692a0fa33b
print filename in liberty log_header
2023-01-11 21:31:46 +01:00
Jannis Harder
3ebc50dee4
Merge pull request #3467 from jix/fix_cellarray_simplify
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simplify: Do not recursively simplify AST_CELL within AST_CELLARRAY
2022-12-19 16:05:13 +01:00
Miodrag Milanovic
b867dee241
respect noblackbox attribute in verific
2022-12-15 08:17:53 +01:00
Jannis Harder
7ad7b550cb
Merge pull request #3573 from daglem/struct-array-multidimensional
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Support for packed multidimensional arrays within packed structs
2022-12-07 19:24:12 +01:00
Jannis Harder
dd8b412833
simplify: Do not recursively simplify AST_CELL within AST_CELLARRAY
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Otherwise the AST_CELL simplification uses the wrong celltype before the
AST_CELLARRAY simplification has a chance to unroll it and change it to
the $array celltype.
2022-12-07 18:21:36 +01:00
Miodrag Milanović
9362fdb4c6
Merge pull request #3568 from YosysHQ/verific_msg
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Set all Verific messages of certain type to other
2022-12-05 16:22:44 +01:00
Miodrag Milanović
26aaf7683f
Merge pull request #3569 from YosysHQ/ver_no_rewriters
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verific: Ignore errors produced by extension
2022-12-05 16:21:12 +01:00
Dag Lem
22090011ab
Made make_struct_member_range side-effect-free again
2022-12-04 06:54:22 +01:00
Dag Lem
f94eec952f
Support for packed multidimensional arrays within packed structs
2022-12-03 19:54:47 +01:00
Miodrag Milanovic
34a64aa322
set VERI-1063 explicitly
2022-12-02 17:11:17 +01:00
Jannis Harder
4a2b7287ca
Merge pull request #3551 from daglem/struct-array-swapped-range
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Support for arrays with swapped ranges within structs
2022-12-01 00:58:32 +01:00
Dag Lem
64f88eb7f1
Added asserts for current limitation of array dimensions in packed structs
2022-11-30 23:32:41 +01:00
Dag Lem
15c8e74329
Check for all cases of currently unsupported array dimensions in packed structs
2022-11-30 20:04:45 +01:00
Miodrag Milanovic
2dd55d73a0
reset elaboration error after rewriter
2022-11-30 17:26:48 +01:00
Miodrag Milanovic
bfd79845b6
Set all verific messages of certain type to other
2022-11-30 16:42:37 +01:00
Miodrag Milanovic
f764cd1655
update documentation
2022-11-25 14:27:30 +01:00
Miodrag Milanovic
b0be19c126
Support importing verilog configurations using Verific
2022-11-25 13:02:11 +01:00
Dag Lem
ddb12148e7
Support for swapped ranges in second array dimension
2022-11-23 16:31:08 +01:00
Jannis Harder
fc2f622a27
Merge pull request #3552 from daglem/fix-sv-c-array-dimensions
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Correct interpretation of SystemVerilog C-style array dimensions
2022-11-23 15:12:17 +01:00
Jannis Harder
239ecf9185
Merge branch 'zachjs-master'
2022-11-21 17:47:43 +01:00
Dag Lem
a862642fac
Correct interpretation of SystemVerilog C-style array dimensions
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IEEE Std 1800™-2017 7.4.2 specifies that [size] is the same as [0:size-1].
2022-11-13 07:41:25 +01:00
Dag Lem
bab88630c2
Support for arrays with swapped ranges within structs
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This also corrects the implementation of C type arrays within structs.
Fixes #3550
2022-11-12 08:48:25 +01:00
Miodrag Milanovic
59b6ac47c9
Add additional help info
2022-10-31 18:04:34 +01:00
Miodrag Milanovic
6fb80bce15
Enable importing blackbox modules only
2022-10-31 10:51:28 +01:00
Miodrag Milanovic
e702f2894a
Support for reading liberty files using verific
2022-10-31 10:15:05 +01:00
Zachary Snow
71e7e09092
verilog: Support module-scoped task/function calls
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This is primarily intended to enable the standard-permitted use of
module-scoped identifiers to refer to tasks and non-constant functions.
As a side-effect, this also adds support for the non-standard use of
module-scoped identifiers referring to constant functions, a feature
that is supported in some other tools, including Iverilog.
2022-10-29 15:14:11 -04:00
Miodrag Milanovic
48628fbf5a
Skip verific primitives and operators import by default
2022-10-14 17:41:24 +02:00
Miodrag Milanovic
922f8b614a
Add option to import all cells from all libraries
2022-10-14 16:54:57 +02:00
Miodrag Milanovic
03df1ac72b
fix whitespace
2022-10-10 16:31:29 +02:00
Miodrag Milanović
e8ce9442a6
Merge pull request #3452 from ALGCDG/master
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Add BLIF names command input plane size check
2022-10-10 16:29:27 +02:00
Claire Xenia Wolf
090228a6a1
Fix handling of verific -L options, add implicit "-L work"
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2022-10-10 00:47:42 +02:00
Miodrag Milanovic
1a6f10e8ba
Add support for EDIF file reading using Verific
2022-10-04 09:18:44 +02:00
Archie
d29606532a
Changing error reason string to be based on lut input plane limit constant.
2022-10-02 22:05:51 +02:00
Miodrag Milanovic
43267dec99
support file content redirection for verific frontened
2022-09-28 15:56:46 +02:00
Miodrag Milanovic
b45517f7b7
Add comment for future self
2022-09-28 14:45:39 +02:00
Miodrag Milanovic
f54ac8a6d6
Handle attributes imported from verific
2022-09-28 08:51:26 +02:00
Miodrag Milanovic
8fb498744f
Import memory attributes
2022-09-21 15:48:40 +02:00
Miodrag Milanovic
3f94f9313a
verific: better fix for read callback
2022-09-07 09:48:19 +02:00
Miodrag Milanovic
06a9c7499a
verific: fix crash when using prep right after read
2022-09-07 09:40:14 +02:00
KrystalDelusion
9465b2af95
Fitting help messages to 80 character width
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Uses the regex below to search (using vscode):
^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);
Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
2022-08-24 10:40:57 +12:00
Archie
15a0697c70
Adding check for BLIF names command input plane size.
2022-08-21 23:18:20 -05:00
Miodrag Milanovic
b76c72056b
set default_nettype to wire for resetall
2022-08-10 13:28:19 +02:00
Miodrag Milanovic
545a3417c8
resetall does not affect text defines, but undefineall does
2022-08-10 11:38:50 +02:00
Miodrag Milanovic
6c65ca4e50
Encode filename unprintable chars
2022-08-08 16:13:33 +02:00
Miodrag Milanovic
2b1aeb44d9
verific - make filepath handling compatible with verilog frontend
2022-08-08 11:57:28 +02:00
Miodrag Milanović
15393442d6
Merge pull request #3089 from YosysHQ/gatecat/liberty_wb
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Add read_liberty -wb
2022-08-01 17:08:04 +02:00
Miodrag Milanovic
52a4a89265
Setting wire upto in verific import
2022-07-29 17:10:31 +02:00
