Emil J. Tywoniak
498e0498c5
const: represent string constants as string, assert not accessed as bits
2024-07-29 16:38:32 +02:00
Emil J
43c1328fbb
Merge pull request #4479 from yrabbit/z1-power
...
Gowin. Add an energy saving primitive
2024-07-18 11:56:00 +02:00
YRabbit
19bbdd8800
Gowin. Add the DCS primitive
...
Not so much adding the primitive itself, but only its DCS_MODE
parameter, without which an error occurs.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-11 21:39:44 +10:00
YRabbit
9d0bca9775
Gowin. Add an energy saving primitive
...
We add a BANDGAP primitive used to turn off power to OSC, PLL and other
things on some GOWIN chips.
We also mark this primitive and GSR as keep.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-06 18:58:21 +10:00
Lofty
8cc9aa7fc6
intel_alm: drop quartus support
2024-05-03 11:32:33 +01:00
KrystalDelusion
c3ae33da33
Merge pull request #4285 from YosysHQ/typo_fixup
...
Typo fixing
2024-04-25 09:54:48 +12:00
Martin Povišer
dc746080f5
Merge pull request #4298 from povik/kogge-stone
...
techmap: Add a Kogge-Stone option for `$lcu` mapping
2024-04-08 16:46:06 +02:00
Martin Povišer
5f4d13ee3f
techmap: Note down iteration in Kogge-Stone
2024-04-08 16:45:40 +02:00
N. Engelhardt
8e8885e1cc
Merge pull request #4323 from YosysHQ/tests_update
...
Tests update for latest more strict iverilog
2024-04-08 15:10:59 +02:00
Miodrag Milanovic
4ac10040ce
Enable SV for localparam use by Efinix cell_sim
2024-04-08 12:45:43 +02:00
Emil J. Tywoniak
9510293a94
fixup
2024-04-04 18:16:58 +02:00
Emil J. Tywoniak
a580a7c82c
docs: Document $macc
2024-04-03 20:37:54 +02:00
Martin Povišer
bc087f91ed
techmap: Fix using overwritten results in Kogge-Stone
2024-03-27 18:32:25 +01:00
Martin Povišer
4570d064e5
techmap: Split out Kogge-Stone into a separate file
2024-03-27 11:07:24 +01:00
Martin Povišer
c38201e15d
techmap: Add a Kogge-Stone option for $lcu mapping
2024-03-25 14:56:17 +01:00
Krystine Sherwin
ff10aeebd6
Fix some synth_* help messages
...
Mostly memory_libmap arg checks; puts the checks into an else block on the `if (help_mode)` check to avoid cases like `synth_ice40` listing `-no-auto-huge [-no-auto-huge]`.
Also fix `map_iopad` section being empty in `synth_fabulous`.
2024-03-18 11:33:18 +13:00
Martin Povišer
570a8f12b5
synth: Fix out-of-sync help message
...
Co-authored-by: N. Engelhardt <nakengelhardt@gmail.com>
2024-03-06 14:55:43 +01:00
Martin Povišer
d2a7ce04ea
synth: Rename -inject to -extra-map
2024-03-01 10:54:51 +01:00
Martin Povišer
ba07cba6ce
synth: Introduce -inject for amending techmap
2024-02-22 17:38:48 +01:00
Martin Povišer
d77b792156
synth: Put in missing bounds check for -lut
2024-02-22 17:24:26 +01:00
Miodrag Milanović
edb95c69a9
Merge pull request #4084 from jix/scopeinfo
...
$scopeinfo support
2024-02-12 09:51:22 +01:00
Martin Povišer
7a3316dd78
synth: Tweak phrasing of -booth help
2024-02-08 00:05:15 +01:00
Martin Povišer
a98d363d9d
synth: Run script in full in help mode
2024-02-08 00:05:15 +01:00
Jannis Harder
f728927307
Add builtin celltype $scopeinfo
...
Only declares the cell interface, doesn't make anything use or
understand $scopeinfo yet.
2024-02-06 17:51:24 +01:00
Catherine
c7bf0e3b8f
Add new $check cell to represent assertions with a message.
2024-02-01 20:10:39 +01:00
YRabbit
79c5a06673
gowin: Fix SDP write enable port.
...
This primitive does not have a separate WRE port, so we regulate writing
using Clock Enable.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-01-30 17:06:59 +10:00
YRabbit
a5fdf3f881
gowin: Change BYTE ENABLE handling.
...
When inferring we allow writing to all bytes for now.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-01-27 17:19:49 +10:00
YRabbit
ae991abf2e
gowin: fix the BRAM mapping.
...
The primitives used have been corrected and changes have been made to the set of signals.
The empirically established need to set the OCEx signal to 1 when using READ_MODE=0 is reflected.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-01-19 15:26:37 +10:00
Martin Povišer
568418b50b
opt_lut: Replace -dlogic with -tech ice40
2024-01-15 12:35:21 +01:00
Miodrag Milanovic
627fbc3477
Fix Windows build by forcing initialization order, fixes #4068
2024-01-02 11:26:48 +01:00
Miodrag Milanović
86b8a1c5ae
Merge pull request #4087 from povik/lattice-dp8kc-fix
...
lattice: Fix mapping onto DP8KC for data width 1 or 2
2023-12-21 11:46:11 +01:00
Martin Povišer
c028f25158
lattice: Disable broken port configuration in bram inference
2023-12-21 10:47:40 +01:00
Martin Povišer
fc5c5172f8
lattice: Fix mapping onto DP8KC for data width 1 or 2
2023-12-20 23:42:12 +01:00
Miodrag Milanović
a4ad7cb81a
Merge pull request #4049 from pepijndevos/patch-3
...
Enable bram for Gowin
2023-12-19 08:16:54 +01:00
N. Engelhardt
d87bd7ca3f
Merge pull request #3887 from kivikakk/env-bash
...
tests: use /usr/bin/env for bash.
2023-12-18 16:33:35 +01:00
Miodrag Milanovic
6dc62bd013
Fix out of tree build
2023-12-06 09:56:35 +01:00
Miodrag Milanovic
d71dd5b9bb
Fix out of tree build
2023-12-06 09:11:51 +01:00
Martin Povišer
16ea497d7c
pmgen: Have a single make pattern
...
Remove duplicate %.pmg -> %_pm.h pattern. One of the duplicates overrode
the other, and in some conditions there were build races as to whether
the target directory for the generated header would exist. Instead have
a single rule which is properly generalized.
2023-12-05 18:30:13 +01:00
Martin Povišer
e0fc48e196
quicklogic: Generate bram_types_sim.v at build time
2023-12-04 18:21:00 +01:00
Martin Povišer
22cc4aff51
quicklogic: Test TDP36K inference with initial data
2023-12-04 15:52:03 +01:00
N. Engelhardt
f9c8978128
add example memory test
2023-12-04 15:52:03 +01:00
Martin Povišer
e0a6a01ecb
quicklogic: Add RAM_INIT to specialized BRAM models
2023-12-04 15:52:03 +01:00
Martin Povišer
4903f99f85
quicklogic: Add missing RAM_INIT param on TDP36K sim model
2023-12-04 15:52:03 +01:00
Martin Povišer
b602c0858f
quicklogic: Set initial values on inferred TDP36K
2023-12-04 15:52:03 +01:00
Martin Povišer
b30544d61d
ql_dsp_io_regs: Fix ID strings, constant detection
2023-12-04 15:52:03 +01:00
Martin Povišer
dad85b5178
synth_quicklogic: Fix missing FF mapping
2023-12-04 15:52:03 +01:00
Martin Povišer
532aca28ab
quicklogic: Drop blackbox off adder_carry
2023-12-04 15:52:03 +01:00
Martin Povišer
e19833f8c7
synth_quiclogic: Fix conditioning of bram passes
2023-12-04 15:52:02 +01:00
Martin Povišer
e43810e13f
ql_dsp_macc: Tune DSP inference code
2023-12-04 15:52:02 +01:00
Martin Povišer
7d738b07da
ql_dsp_*: Clean up
...
Clean up the code up to Yosys standards. Drop detection of
QL_DSP2_MULTADD in io_regs since those cells can't be inferred with
the current flow anyway.
2023-12-04 15:52:02 +01:00
