mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-31 03:32:29 +00:00
Code Activity
8352 commits 122 branches 59 tags 72 MiB
Commit graph

8352 commits

This branch
This branch
All branches
Author SHA1 Message Date
Clifford Wolf
6995914f3f Use ID() macro in all of passes/opt/ 
This was obtained by running the following SED command in passes/opt/
and then using "meld foo.cc foo.cc.orig" to manually fix all resulting
compiler errors.

sed -i.orig -r 's/"\\\\([a-zA-Z0-9_]+)"/ID(\1)/g; s/"(\$[a-zA-Z0-9_]+)"/ID(\1)/g;' *.cc

Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-11 11:39:46 +02:00
Clifford Wolf
b5534b66c8 Improve API of ID() macro 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-11 11:39:46 +02:00
Miodrag Milanovic
853c755a0c Replaced custom step with setundef 2019-08-11 11:01:46 +02:00
Miodrag Milanovic
e609537e38 Fixed data width 2019-08-11 10:46:48 +02:00
Miodrag Milanovic
8c8100e0df Adding new pass to fix carry chain 2019-08-11 10:17:49 +02:00
Miodrag Milanovic
b3a91d6508 cleanup 2019-08-11 08:37:56 +02:00
Eddie Hung
c851dc1310
Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder 
Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"
 2019-08-10 14:18:16 -07:00
Eddie Hung
282cc77604 Wrong way around 2019-08-10 11:55:00 -07:00
David Shah
f9020ce2b3
Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER" 2019-08-10 17:14:48 +01:00
Eddie Hung
02b0d328ad cover_list -> cover as per @cliffordwolf 2019-08-10 08:26:41 -07:00
Clifford Wolf
f54bf1631f
Merge pull request #1258 from YosysHQ/eddie/cleanup 
Cleanup a few barnacles across codebase
 2019-08-10 09:52:14 +02:00
Clifford Wolf
4f81213165
Merge pull request #1261 from YosysHQ/clifford/verific_init 
Automatically prune init attributes in verific front-end
 2019-08-10 09:47:25 +02:00
Clifford Wolf
05c46a31dc
Merge pull request #1263 from ucb-bar/firrtl_err_on_unsupported_cell 
FIRRTL error on unsupported cell
 2019-08-10 09:47:10 +02:00
Clifford Wolf
a469d1a64a
Merge pull request #1270 from YosysHQ/eddie/alu_lcu_doc 
Add a few comments to document $alu and $lcu
 2019-08-10 09:46:46 +02:00
Clifford Wolf
465a59319a
Merge pull request #1272 from mmicko/travis_fix 
Propagate parameters for Travis build
 2019-08-10 09:45:26 +02:00
Clifford Wolf
b1e817e616
Merge pull request #1274 from YosysHQ/eddie/fix_1271 
Add __STDC_FORMAT_MACROS before <inttypes.h> as per @mithro
 2019-08-10 09:45:06 +02:00
Clifford Wolf
dad9514d86
Merge pull request #1276 from YosysHQ/clifford/fix1273 
Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default gate lib
 2019-08-10 09:38:22 +02:00
Eddie Hung
ab1d63a565 Check nusers of DSP output, not whole flop 2019-08-09 17:35:13 -07:00
Eddie Hung
3dd3ab98c2 Improve ice40_dsp for non-fully-32-bit adders 2019-08-09 17:23:12 -07:00
Eddie Hung
6d254f2de8 Add wreduce to synth_ice40 -dsp as well 2019-08-09 17:05:56 -07:00
Eddie Hung
dfc878deb4 Another filter -> if 2019-08-09 16:23:32 -07:00
Eddie Hung
e83f231927 Cleanup 2019-08-09 15:47:40 -07:00
Eddie Hung
0b5b56c1ec Pack partial-product adder DSP48E1 packing 2019-08-09 15:19:33 -07:00
Eddie Hung
a002eba14a Fix check 2019-08-09 14:27:08 -07:00
Eddie Hung
82cbfada1b Revert "Fix typo" 
This reverts commit e3c39cc450.
 2019-08-09 14:14:28 -07:00
Eddie Hung
849e0eeab4 Grammar 2019-08-09 12:43:21 -07:00
Eddie Hung
041defc5a6 Reformat so it shows up/looks nice when "help $alu" and "help $alu+" 2019-08-09 12:33:39 -07:00
Eddie Hung
31f6d74552 Separate $alu handling 2019-08-09 12:13:32 -07:00
Eddie Hung
0adf81cb91 Add $alu tests 2019-08-09 12:13:17 -07:00
Eddie Hung
9f1b82f594 opt_expr -fine to trim LSBs of $alu too 2019-08-09 10:32:12 -07:00
Eddie Hung
8350dfb809 Add alumacc versions of opt_expr tests 2019-08-09 10:30:53 -07:00
Eddie Hung
9300111601 Add new $alu test, remove wreduce 2019-08-09 10:22:06 -07:00
Clifford Wolf
6d0be8d206 Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default gate lib, add "abc -g all", fixes #1273 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-09 19:17:59 +02:00
Eddie Hung
313c9ec8df Cleanup some more 2019-08-09 10:13:49 -07:00
whitequark
39f4c1096a
Merge pull request #1267 from whitequark/proc_prune-fix-1243 
proc_prune: fix handling of exactly identical assigns
 2019-08-09 17:10:46 +00:00
Eddie Hung
d9c1664462 Simplify opt_expr tests using equiv_opt 2019-08-09 10:08:17 -07:00
Eddie Hung
acfb672d34 A bit more on where $lcu comes from 2019-08-09 09:50:47 -07:00
Eddie Hung
5aef998957 Add more comments 2019-08-09 09:48:17 -07:00
Eddie Hung
446dcb3ed3 Add __STDC_FORMAT_MACROS before <inttypes.h> as per @mithro 2019-08-09 09:17:35 -07:00
Miodrag Milanovic
d51b135e33 Fix CO 2019-08-09 12:37:10 +02:00
Miodrag Milanovic
7a860c5623 Merge remote-tracking branch 'upstream/master' into efinix 2019-08-09 09:46:37 +02:00
Miodrag Milanovic
8853d6d232 ABC requires it like this 2019-08-09 08:54:17 +02:00
Miodrag Milanovic
5130a65865 Propagate parameters for Travis build 2019-08-09 08:06:14 +02:00
Eddie Hung
747690a6df Remove muxY and ffY for now 2019-08-08 16:33:37 -07:00
Eddie Hung
1f722b3500 Remove signed from ports in +/xilinx/dsp_map.v 2019-08-08 16:33:20 -07:00
Eddie Hung
2c0be7aa5d Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing 2019-08-08 12:56:05 -07:00
Eddie Hung
162eab6b74 Combine techmap calls 2019-08-08 10:55:48 -07:00
Eddie Hung
07e50b9c25 Only pack registers if {A,B,P}REG = 0, do not pack $dffe 2019-08-08 10:51:19 -07:00
Eddie Hung
7160243874 Move xilinx_dsp to before alumacc 2019-08-08 10:45:56 -07:00
Eddie Hung
911129e3ef Disable $dffe 2019-08-08 10:44:49 -07:00