Akash Levy
4356eae4c9
Yosys sync
2024-12-04 14:16:55 -08:00
Martin Povišer
59a96470df
Merge pull request #4773 from povik/wrapcell
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wrapcell: Add new command
2024-12-04 11:49:51 +01:00
Martin Povišer
109d97bb40
Merge pull request #4706 from povik/keep_hierarchy-adjustalgo
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Adjust `keep_hierarchy` behavior
2024-12-03 12:18:28 +01:00
Martin Povišer
79e9258a31
wrapcell: Add new command
2024-11-27 14:01:00 +01:00
Akash Levy
3190771892
Small fixes to get a test working
2024-11-16 22:21:58 -08:00
Akash Levy
1017b19405
Small README updates
2024-11-12 02:53:13 -08:00
Akash Levy
ea76abdaee
Merge
2024-11-11 11:47:58 -08:00
Martin Povišer
1b1a6c4aed
Merge pull request #4525 from georgerennie/peepopt_clock_gate
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peepopt: Add formal opt to rewrite latches to ffs in clock gates
2024-11-11 14:49:09 +01:00
Akash Levy
fa50434708
Merge branch 'YosysHQ:main' into main
2024-11-08 14:10:24 -08:00
Martin Povišer
69a36aec3b
Add keep_hierarchy test
2024-11-05 09:28:45 +01:00
Krystine Sherwin
ee73a91f44
Remove references to ilang
2024-11-05 12:36:31 +13:00
Akash Levy
4334792d0c
Update gitignore
2024-10-10 13:34:05 -07:00
Akash Levy
b0b89627ac
Disable broken test
2024-10-10 13:31:59 -07:00
Akash Levy
fdc4c54c66
Merge branch 'YosysHQ:main' into main
2024-10-07 07:27:27 -10:00
Martin Povišer
e46cc57cc4
Merge pull request #4613 from povik/err-never-silence
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log: Never silence `log_cmd_error`
2024-10-07 16:12:31 +02:00
Martin Povišer
b01b17689e
Add test of error not getting silenced
2024-10-07 14:49:17 +02:00
Martin Povišer
d0a11e26f3
aiger2: Add test of writing a flattened view
2024-10-07 12:04:33 +02:00
Akash Levy
dd487ca8a1
Updating Yosys
2024-10-03 01:46:09 -07:00
Akash Levy
ed2c65314b
Standardize convention, add back test, update README
2024-09-23 06:06:43 -07:00
Akash Levy
db14842d9c
Skip some various tests and fix scopeinfo to match our convention
2024-09-23 05:39:39 -07:00
Martin Povišer
ea765686b6
aiger2: Adjust hierarchy/port handling
2024-09-18 16:55:02 +02:00
Martin Povišer
6c1fa45995
aiger2: Ingest $pmux
2024-09-18 16:42:56 +02:00
Martin Povišer
8e29675a23
aiger2: Support $bwmux, comparison operators
2024-09-17 13:55:58 +02:00
Martin Povišer
fb26945a20
Start an 'aiger2' backend
2024-09-17 13:55:58 +02:00
Akash Levy
57446f3f93
Merge branch 'YosysHQ:main' into master
2024-08-21 18:52:38 -07:00
Roland Coeurjoly
91e3773b51
Ensure signed constants are correctly parsed, represented, and exported in RTLIL. Add a test to check parsing and exporting
2024-08-21 14:28:42 +01:00
George Rennie
b6ceff2aab
peepopt clockgateff: add testcase
2024-08-07 10:21:52 +01:00
Akash Levy
e0d96d35a1
Merge branch 'YosysHQ:main' into master
2024-06-01 23:47:26 -07:00
Martin Povišer
97fedff383
box_derive: Tune the test
2024-05-29 20:42:11 +02:00
Martin Povišer
bff2443af8
box_derive: Finish the test
2024-05-21 16:34:49 +02:00
Martin Povišer
c0a196173a
Rename bbox_derive to box_derive
2024-05-21 16:18:03 +02:00
Martin Povišer
557db4ea46
bbox_drive: Add an incomplete test
2024-05-21 14:57:49 +02:00
Akash Levy
45b723d6f3
Merge branch 'YosysHQ:main' into master
2024-04-25 06:24:57 -07:00
N. Engelhardt
e8ec19c273
add command that should not have any effect to hierarchy -generate test (this documents the current behavior, not sure if it is desired functionality)
2024-04-12 13:51:06 +02:00
N. Engelhardt
b87327d1b9
fix hierarchy -generate mode handling of cells
2024-04-12 13:38:33 +02:00
akash
19dbde2891
Merge commit
2024-03-29 19:30:48 -07:00
Akash Levy
dd35d2da23
Modifications
2024-03-21 11:31:43 -07:00
Martin Povišer
87e72ef86f
celledges: Add read ports arst paths
2024-03-11 10:45:17 +01:00
Martin Povišer
e4296072c4
check: Rephrase regex for portability
2024-03-11 10:45:17 +01:00
Martin Povišer
e1e77a7fa9
check: Extend testing
2024-03-11 10:45:17 +01:00
Martin Povišer
3eef6450f1
check: Add coarse-grain false positive test
2024-03-11 10:43:49 +01:00
N. Engelhardt
d70113a909
Merge pull request #3972 from nakengelhardt/celledges_shift_ops
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celledges: support shift ops
2024-03-08 09:35:47 +01:00
Jannis Harder
bbdfcfdf30
clk2fflogic: Fix handling of $check cells
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Fixes a bug in the handling of the recently introduced $check cells.
Both $check and $print cells in clk2fflogic are handled by the same code
and the existing tests for that were only using $print cells. This
missed a bug where the additional A signal of $check cells that is not
present on $print cells was dropped due to a typo, rendering $check
cells non-functional.
Also updates the tests to explicitly cover both cell types such that
they would have detected the now fixed bug.
2024-02-14 11:42:27 +01:00
Miodrag Milanović
edb95c69a9
Merge pull request #4084 from jix/scopeinfo
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$scopeinfo support
2024-02-12 09:51:22 +01:00
Thomas Watson
10e06f9b66
tests/various/clk2fflogic_effects.sh: remove /tmp use
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Might not be accessible.
2024-02-10 15:09:54 -06:00
Thomas Watson
b1f8308772
tests/various/clk2fflogic_effects.sh: fix tail invocation
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Previous syntax is a GNU extension and not accepted by macOS. Use
documented -n option instead, compatible with POSIX-compliant tail
implementations.
2024-02-10 15:07:55 -06:00
Jannis Harder
9288107f43
Test flatten and opt_clean's $scopeinfo handling
2024-02-06 17:51:29 +01:00
Jannis Harder
ffb82df33c
Additional tests for FV $check compatibility
2024-02-02 16:07:10 +01:00
Jannis Harder
e1a59ba80b
async2sync, clk2fflogic: Add support for $check and $print cells
2024-02-01 20:10:39 +01:00
Jannis Harder
331ac5285f
tests: Run async2sync before sat and/or sim to handle $check cells
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Right now neither `sat` nor `sim` have support for the `$check` cell.
For formal verification it is a good idea to always run either
async2sync or clk2fflogic which will (in a future commit) lower `$check`
to `$assert`, etc.
While `sim` should eventually support `$check` directly, using
`async2sync` is ok for the current tests that use `sim`, so this commit
also runs `async2sync` before running sim on designs containing
assertions.
2024-02-01 16:14:11 +01:00
