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642 commits

Author SHA1 Message Date
Krystine Sherwin cd3b914132
Reinstate #4768
Revert the reversion so that we can fix the bugs that the PR missed.
2025-04-08 11:58:05 +12:00
Krystine Sherwin 406b400458
opt_expr: Fix #4590
If all the (non-select) inputs of a `$_MUX{4,8,16}_` are undefined, replace it, just like we do for `$mux` and `$_MUX_`.
Add `tests/opt/opt_expr_mux_undef.ys` to verify this.

This doesn't do any const folding on the wide muxes, or shrinking to less wide muxes.  It only handles the case where all inputs are 'x and the mux can be completely removed.
2025-04-04 12:25:31 +13:00
Anhijkt 6b5507139e opt_expr: requsted changes 2025-04-01 20:37:22 +03:00
Anhijkt 83b095ab6c opt_expr: optimize pow of 2 cells 2025-03-30 15:43:41 +03:00
KrystalDelusion a647731812
Merge pull request #4677 from YosysHQ/emil/opt_merge-hashing
opt_merge: hashing performance and correctness
2025-03-25 10:36:02 +13:00
KrystalDelusion b06a661913
Merge pull request #4834 from YosysHQ/emil/gzip-refactor
Memory-efficient zlib usage across Liberty file consumers
2025-03-21 10:01:00 +13:00
Emil J b33787edcb
Merge pull request #4948 from YosysHQ/emil/share-fix-log-again
share: re-add SAT solver cell count to log message
2025-03-19 13:54:17 +01:00
Emil J. Tywoniak 4f3fdc8457 io: refactor string and file work into new unit 2025-03-19 13:43:42 +01:00
Emil J. Tywoniak 061cf5c6c4 share: re-add SAT solver cell count to log message 2025-03-19 10:27:23 +01:00
Emil J 05cd1e2942
Merge pull request #4904 from YosysHQ/emil/share-limit-effort
share: add -pattern-limit to limit analysis effort
2025-03-15 18:00:42 +01:00
Emil J. Tywoniak 6c9857403c share: use share.pattern_limit from scratchpad 2025-03-11 14:57:00 +01:00
Emil J. Tywoniak ca9176cd0f share: bail better on too many patterns 2025-03-10 17:55:04 +01:00
Martin Povišer d8a4991289
Merge pull request #4931 from povik/buf-clean
opt_clean, simplemap: Add `$buf` handling
2025-03-10 15:10:17 +01:00
Emil J. Tywoniak 1d773b50a4 opt_merge: fix dangling pointers in known_cells when keep attribute is used 2025-03-10 13:14:06 +01:00
Emil J. Tywoniak 176faae7c9 opt_merge: fix trivial binary regression 2025-03-10 13:14:06 +01:00
Emil J. Tywoniak 8903740147 opt_merge: switch to unordered_set 2025-03-10 13:14:06 +01:00
Emil J. Tywoniak ffc057a89c opt_merge: fix the many collisions case 2025-03-10 13:14:06 +01:00
Emil J. Tywoniak cbb776c626 opt_merge: avoid hashing strings 2025-03-10 13:14:06 +01:00
Emil J 8bb24badf2
Merge pull request #4895 from YosysHQ/emil/fix-share-portbit-infinite-loop
share: fix infinite loop in find_terminal_bits on $mux loop
2025-03-08 13:14:11 +01:00
Martin Povišer 557047fe1e opt_clean, simplemap: Add $buf handling 2025-03-07 16:08:38 +01:00
Emil J 912c93ca0b
share: help message formatting
Co-authored-by: KrystalDelusion <93062060+KrystalDelusion@users.noreply.github.com>
2025-03-03 18:52:05 +01:00
KrystalDelusion 9106d6b3bd
Merge pull request #4881 from YosysHQ/pmgen-pass-restructure
Move passes out of the passes/pmgen folder
2025-03-01 10:22:54 +13:00
Emil J. Tywoniak 8968986b54 share: add -pattern-limit to set analysis effort on branch-unbranch mux regions 2025-02-14 21:13:07 +01:00
Krystine Sherwin 4c728968a3
Fix runtime error on shr INT_MAX 2025-02-14 14:01:36 +13:00
Emil J. Tywoniak 01d2bfcf00 share: fix infinite loop in find_terminal_bits on $mux loop 2025-02-12 10:16:44 +01:00
Krystine Sherwin 0ec5f1b756
pmgen: Move passes out of pmgen folder
- Techlib pmgens are now in relevant techlibs/*.
- `peepopt` pmgens are now in passes/opt.
- `test_pmgen` is still in passes/pmgen.
- Update `Makefile.inc` and `.gitignore` file(s) to match new `*_pm.h` location,
  as well as the `#include`s.
- Change default `%_pm.h` make target to `techlibs/%_pm.h` and move it to the
  top level Makefile.
- Update pmgen target to use `$(notdir $*)` (where `$*` is the part of the file
  name that matched the '%' in the target) instead of `$(subst _pm.h,,$(notdir
  $@))`.
2025-01-31 15:18:28 +13:00
Emil J. Tywoniak c2691207df wreduce: fix warning for deprecated IdString::in(pool<IdString>) 2025-01-30 12:01:30 +01:00
Martin Povišer ca0ace66bc
Merge pull request #4817 from povik/macc_v2-1
macc: Stop using the B port
2025-01-08 14:42:51 +01:00
Martin Povišer 366e3f22fb
Merge pull request #4836 from YosysHQ/emil/share-fix-log
share: fix misleading 0 cells log message
2025-01-08 13:14:34 +01:00
Martin Povišer 652a1b9806 macc: Stop using the B port
The B port is for single-bit summands. These can just as well be
represented as an additional summand on the A port (which supports
summands of arbitrary width). An upcoming `$macc_v2` cell won't be
special-casing single-bit summands in any way.

In preparation, make the following changes:

 * remove the `bit_ports` field from the `Macc` helper (instead add any
   single-bit summands to `ports` next to other summands)

 * leave `B` empty on cells emitted from `Macc::to_cell`
2025-01-08 13:03:35 +01:00
Emil J. Tywoniak 1836a571c9 share: fix misleading log message 2025-01-07 19:25:15 +01:00
Martin Povišer be351886a5 wreduce: Adjust naming and comments 2025-01-03 12:54:34 +01:00
Martin Povišer 08778917db wreduce: Optimize signedness when possible 2024-12-16 12:57:08 +01:00
Emil J cc17d5bb70
Merge pull request #4612 from georgerennie/george/opt_demorgan_zero_width
opt_demorgan: skip zero width cells
2024-11-20 13:33:16 +01:00
Emil J 18459b4b09
Merge pull request #4614 from georgerennie/george/opt_reduce_cell_width
opt_reduce: keep at least one input to $reduce_or/and cells
2024-11-20 13:33:04 +01:00
Emil J. Tywoniak 785bd44da7 rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
George Rennie 023f029dcf opt_reduce: keep at least one input to $reduce_or/and cells 2024-09-25 16:21:19 +01:00
George Rennie 58af70624f opt_demorgan: skip zero width cells 2024-09-24 14:24:59 +01:00
Emil J 1166238c0f
Merge pull request #4176 from povik/opt_expr-performance
Improve `opt_expr` performance
2024-07-15 16:10:25 +02:00
Emil J. Tywoniak 532188f239 opt_expr: change info message 2024-07-15 11:14:47 +02:00
Catherine 580aaa362d
opt_lut_ins: fix name of global object. NFCI 2024-06-28 15:12:36 +00:00
Emil J. Tywoniak 01f332e750 opt_expr: reduce mostly harmless warning to log 2024-06-25 20:18:49 +02:00
Martin Povišer fa4a2b6b0d opt_expr: In clkinv loop ignore irrelevant cells early
Each call to `handle_clkpol_celltype_swap` has a conversion of the
cell's type ID to an allocated string. This can sum up to a
non-negligible time being spent in the clkpol code even for a design
which doesn't have any flip-flop gates.
2024-06-24 18:32:33 +02:00
Martin Povišer 7a8a69b65c opt_expr: Revisit sorting in replace_const_cells
Avoid building a cell-to-inbit map when sorting the cells, add a warning
if we are unable to sort, and move the code treating non-combinational
cells ahead of the rest (this means we don't need to pass
non-combinational cells to the TopoSort object at all).
2024-06-24 18:32:33 +02:00
Martin Povišer 4a8cdfabbb
Merge pull request #4169 from povik/clean-opt_clean-step2
opt_clean: Remove dead assertion
2024-04-13 18:12:40 +02:00
Emil J. Tywoniak 4bb3b099d2 opt_demorgan: fix extra args warning 2024-04-03 10:02:53 +02:00
Martin Povišer 030d639201 opt_mem, memory_*: Refuse to operate in presence of processes
Processes can contain `MemWriteAction` entries which are invisible to
most passes operating on memories but which will be lowered to write
ports later on by `proc_memwr`. For that reason we can get corrupted
RTLIL if we sequence the memory passes before `proc`. Address that by
making the affected memory passes ignore modules with processes.
2024-02-23 12:27:53 +01:00
Miodrag Milanović edb95c69a9
Merge pull request #4084 from jix/scopeinfo
$scopeinfo support
2024-02-12 09:51:22 +01:00
Miodrag Milanović 2f4c917dac
Merge pull request #4181 from povik/ci-cxxstd-fix
ci: Fix CXXSTD typo
2024-02-08 18:55:47 +01:00
Martin Povišer 043f1e2bcb opt_lut: Remove leftover -dlogic help 2024-02-08 17:49:44 +01:00