2419 commits

Author	SHA1	Message	Date
Eddie Hung	1fa2c36fbd	Trim A_WIDTH by Y_WIDTH-1	2019-04-22 17:14:11 -07:00
Eddie Hung	69863f7698	Add comment	2019-04-22 16:58:44 -07:00
Eddie Hung	61161faefc	Fix for mux_case_* mappings	2019-04-22 16:56:18 -07:00
Eddie Hung	ac1e13819e	Fix for non-pow2 width muxes	2019-04-22 14:26:13 -07:00
Eddie Hung	75b96b1aff	Add synth_xilinx -nomux option	2019-04-22 12:36:15 -07:00
Eddie Hung	79fb291dbe	Cleanup, call pmux2shiftx even without -nosrl	2019-04-22 12:14:37 -07:00
Eddie Hung	4cfef7897f	Merge branch 'xaig' into xc7mux	2019-04-22 11:58:59 -07:00
Eddie Hung	4486a98fd5	Merge remote-tracking branch 'origin/xc7srl' into xc7mux	2019-04-22 11:45:49 -07:00
Eddie Hung	ec88129a5c	Update help message	2019-04-22 11:38:23 -07:00
Eddie Hung	4883391b63	Merge remote-tracking branch 'origin/master' into xaig	2019-04-22 11:19:52 -07:00
Eddie Hung	0e76718720	Move 'shregmap -tech xilinx' into map_cells	2019-04-22 10:45:39 -07:00
Eddie Hung	e300b1922c	Merge remote-tracking branch 'origin/master' into xc7srl	2019-04-22 10:36:27 -07:00
Clifford Wolf	0e7901e45c	Merge pull request #941 from Wren6991/sim_lib_io_clke ... ice40 cells_sim.v: update clock enable behaviour based on hardware experiments	2019-04-22 09:11:13 +02:00
Clifford Wolf	913659d644	Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master	2019-04-22 09:09:27 +02:00
Clifford Wolf	cf1ba46fa0	Re-added clean after techmap in synth_xilinx ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-04-22 09:03:11 +02:00
Clifford Wolf	cbd9b8a3f3	Merge pull request #916 from YosysHQ/map_cells_before_map_luts ... synth_xilinx to map_cells before map_luts	2019-04-22 09:01:00 +02:00
Clifford Wolf	19fd411e77	Merge pull request #911 from mmicko/gowin-nobram ... Make nobram false by default for gowin	2019-04-22 08:58:09 +02:00
Eddie Hung	d342b5b135	Tidy up, fix for -nosrl	2019-04-21 15:33:03 -07:00
Eddie Hung	d7f0700bae	Convert to use #945	2019-04-21 15:19:02 -07:00
Eddie Hung	726e2da8f2	Merge branch 'map_cells_before_map_luts' into xc7srl	2019-04-21 14:28:55 -07:00
Eddie Hung	a3371e118b	Merge branch 'master' into map_cells_before_map_luts	2019-04-21 14:24:50 -07:00
Eddie Hung	ae95aba60a	Add comments	2019-04-21 14:16:59 -07:00
Eddie Hung	d99422411f	Use new pmux2shiftx from #944, remove my old attempt	2019-04-21 14:16:34 -07:00
Luke Wren	71da836300	ice40 cells_sim.v: SB_IO: update clock enable behaviour based on hardware experiments	2019-04-21 21:40:11 +01:00
Eddie Hung	caec7f9d2c	Merge remote-tracking branch 'origin/master' into xaig	2019-04-20 12:23:49 -07:00
Eddie Hung	13ad19482f	Merge remote-tracking branch 'origin' into xc7srl	2019-04-20 10:41:43 -07:00
Eddie Hung	af4652522f	ABC_FLOPS -> ABC_MODEL -- only whitebox if ABC_MODEL set	2019-04-19 21:09:55 -07:00
Eddie Hung	2776925bcf	Make SB_DFF whitebox	2019-04-19 08:36:38 -07:00
Eddie Hung	19b660ff6e	Fix SB_DFF comb model	2019-04-18 23:07:16 -07:00
Eddie Hung	0919f36b88	Missing close bracket	2019-04-18 17:50:11 -07:00
Eddie Hung	cf66416110	Annotate SB_DFF* with abc_flop and abc_box_id	2019-04-18 17:46:53 -07:00
Eddie Hung	ca1eb98a97	Add SB_DFF* to boxes	2019-04-18 17:46:32 -07:00
Eddie Hung	4c327cf316	Use new -wb flag for ABC flow	2019-04-18 10:32:41 -07:00
Eddie Hung	9278192efe	Also update Makefile.inc	2019-04-18 09:58:34 -07:00
Eddie Hung	7b6ab937c1	Make SB_LUT4 a blackbox	2019-04-18 09:05:22 -07:00
Eddie Hung	8024f41897	Fix rename	2019-04-18 09:04:34 -07:00
Eddie Hung	ed5e75ed7d	Rename to abc_*.{box,lut}	2019-04-18 09:02:58 -07:00
Eddie Hung	6008bb7002	Revert "synth_* with -retime option now calls abc with -D 1 as well" ... This reverts commit 9a6da9a79a.	2019-04-18 07:59:16 -07:00
Eddie Hung	0642baabbc	Merge branch 'master' into eddie/fix_retime	2019-04-18 07:57:17 -07:00
Eddie Hung	8fd455c910	Update Makefile.inc too	2019-04-17 15:19:48 -07:00
Eddie Hung	c795e14d25	Reduce to three devices: hx, lp, u	2019-04-17 15:19:02 -07:00
Eddie Hung	5c0853fc51	Add up5k timings	2019-04-17 15:10:39 -07:00
Eddie Hung	4b520ae627	Fix grammar	2019-04-17 15:10:22 -07:00
Eddie Hung	3105a8a653	Update error message	2019-04-17 15:07:44 -07:00
Eddie Hung	6f3e5297db	Add "-device" argument to synth_ice40	2019-04-17 15:04:46 -07:00
Eddie Hung	671cca59a9	Missing abc_flop_q attribute on SPRAM	2019-04-17 14:44:08 -07:00
Eddie Hung	437fec0d88	Map to SB_LUT4 from fastest input first	2019-04-17 13:01:17 -07:00
Eddie Hung	58847df1b9	Mark seq output ports with "abc_flop_q" attr	2019-04-17 12:27:45 -07:00
Eddie Hung	1eade06671	Also update Makefile.inc	2019-04-17 12:27:02 -07:00
Eddie Hung	4fb9ccfcd8	synth_ice40 to use renamed files	2019-04-17 12:22:03 -07:00