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Author SHA1 Message Date
Emil J. Tywoniak 4991ed9d4b cutpoint: fix typo 2025-03-25 18:10:47 +01:00
KrystalDelusion a647731812
Merge pull request #4677 from YosysHQ/emil/opt_merge-hashing
opt_merge: hashing performance and correctness
2025-03-25 10:36:02 +13:00
KrystalDelusion b06a661913
Merge pull request #4834 from YosysHQ/emil/gzip-refactor
Memory-efficient zlib usage across Liberty file consumers
2025-03-21 10:01:00 +13:00
Emil J 9893ed59b7
Merge pull request #4951 from YosysHQ/emil/fix-dft_tag-autoNot
dft_tag: fix autoNot not notting
2025-03-20 21:16:34 +01:00
Krystine Sherwin d704ca8019
abstract: Fix indentation 2025-03-20 17:20:36 +13:00
Krystine Sherwin 452dd1b74b
abstract: Assign default to value
Fix `-Wmaybe-uninitialized` on line 43 and 44.
2025-03-20 17:19:22 +13:00
Emil J. Tywoniak 199702a392 dft_tag: fix autoNot not notting 2025-03-19 18:28:50 +01:00
Emil J b33787edcb
Merge pull request #4948 from YosysHQ/emil/share-fix-log-again
share: re-add SAT solver cell count to log message
2025-03-19 13:54:17 +01:00
Emil J. Tywoniak 980a0a15c1 stat: allow gzipped liberty files 2025-03-19 13:43:44 +01:00
Emil J. Tywoniak 7aefd4b226 gzip: back to pointers 2025-03-19 13:43:44 +01:00
Emil J. Tywoniak 0877798e18 dfflibmap: allow gzipped liberty files 2025-03-19 13:43:44 +01:00
Emil J. Tywoniak d00259081d gzip: simplify uncompressed interface 2025-03-19 13:43:44 +01:00
Emil J. Tywoniak 218ec3fc05 dfflibmap: allow gzipped liberty files 2025-03-19 13:43:44 +01:00
Emil J. Tywoniak 4f3fdc8457 io: refactor string and file work into new unit 2025-03-19 13:43:42 +01:00
Emil J. Tywoniak 061cf5c6c4 share: re-add SAT solver cell count to log message 2025-03-19 10:27:23 +01:00
Martin Povišer 91cd382f8b macc: Rename 'ports' to 'terms' throughout codebase 2025-03-18 13:25:10 +01:00
Emil J 05cd1e2942
Merge pull request #4904 from YosysHQ/emil/share-limit-effort
share: add -pattern-limit to limit analysis effort
2025-03-15 18:00:42 +01:00
KrystalDelusion 9f1271bee0
Merge pull request #4922 from Anhijkt/fix-splitcells-assert
splitcells: Fix the assertion bug caused by out-of-bound offset
2025-03-14 16:52:38 +13:00
Krystine Sherwin 8405b3b723
select: Fix -none and -clear
If the selection stack only has one element (which it normally does), then
`design->pop_selection()` automatically resets to the default full selection.
This is a problem for `select [-none | -clear]` which were trying to replace the
current selection, but because the pop added an extra element when the `execute`
returned, the extra selection (the one we actually wanted) gets popped too. So
instead, reassign `design->selection()` in the same way as if we called `select
[selection]`.

Also adds selection stack tests, and removes the accidentally-committed
`boxes_dummy.ys`.
2025-03-14 16:32:18 +13:00
Krystine Sherwin a3968d43f0
Drop deprecation on Design::selected_modules()
Instead, change the default `Design::selected_modules()` to match the behaviour (i.e. `selected_unboxed_modules_warn()`) because it's a lot of files to touch and they don't really _need_ to be updated.
Also change `Design::selected_whole_modules()` users over to `Design::selected_unboxed_whole_modules()`, except `attrmap` because I'm not convinced it should be ignoring boxes.  So instead, leave the deprecation warning for that one use and come back to the pass another time.
2025-03-14 14:08:56 +13:00
Krystine Sherwin 732c82f851
abc_new: Use push_empty_selection() 2025-03-14 14:08:56 +13:00
Krystine Sherwin add5eba9b2
Design::selection_stack should never be empty
Add a `log_assert` for it in `Design::check()`.
Remove unneeded checks in other places.
2025-03-14 14:08:16 +13:00
Krystine Sherwin 7eaf33e4da
abc9: Use techmap -autoproc
Fixes quicklogic/pp3 problem with `dffepc` including processes.
Also means the preceding `proc` is safe to remove (and may result in some small speedup by doing so).
2025-03-14 14:08:16 +13:00
Krystine Sherwin 38293d3bdf
select.cc: Fix %i when rhs is empty 2025-03-14 14:08:16 +13:00
Krystine Sherwin 2dec493054
abc9.cc: Call select =*
Or rather, say we're calling `select =*`, but actually bypass the select command to avoid the warning that can pop up if there is nothing to select.
2025-03-14 14:08:15 +13:00
Krystine Sherwin cacea737bc
select.cc: Re-add '=' to empty selection warning 2025-03-14 14:08:15 +13:00
Krystine Sherwin a30bacfcb1
Add Selection::complete_selection
Used to select all modules including boxes, set when both `full` and `boxes` are true in the constructor, pulling down `full_selection`.
Add `Selection::selects_all()` method as short hand for `full_selection || complete_selection`.
Update selection operations to account for complete selections.
Add static methods to `Selection` for creating a new empty/full/complete selection to make it clearer to users when doing so.
Use said static methods to replace most instances of the `Selection` constructor.
Update `Selection::optimize` to use
2025-03-14 14:08:15 +13:00
Krystine Sherwin b296a970d2
abc9: Use push_empty_selection() 2025-03-14 14:08:14 +13:00
Krystine Sherwin f15cd73419
Fix select_op_random ignoring boxes 2025-03-14 14:08:14 +13:00
Krystine Sherwin 59802584b0
Fix describe_selection_for_assert
If the current selection is not the provided selection, push the provided selection.
2025-03-14 14:08:14 +13:00
Krystine Sherwin d09ae42951
Fixing selections 2025-03-14 14:08:14 +13:00
Krystine Sherwin dac2bb7d4d
Use selection helpers
Catch more uses of selection constructor without assigning a design.
2025-03-14 14:08:13 +13:00
Krystine Sherwin 398afd102e
Refactor full_selection
The `Design::selected_*()` methods no longer unconditionally skip boxed modules.  Instead, selections are now box and design aware.
The selection constructor now optionally takes a design pointer, and has a new `selects_boxes` flag.  If the selection has an assigned design, then `Selection::selected_*()` will only return true for boxed modules if the selects_boxes flag is set.  A warning is raised if a selection is checked and no design is set.  Selections can change design via the `Selection::optimize()` method.
Most places that iterate over `Design::modules()` and check `Selection::selected_module()` should instead use `Design::selected_modules()`.
Since boxed modules should only ever be selected explicitly, and `full_selection` (now) refers to all non-boxed modules, `Selection::optimize()` will clear the `full_selection` flag if the `selects_boxes` flag is enabled, and instead explicitly selects all modules (including boxed modules).  This also means that `full_selection` will only get automatically applied to a design without any boxed modules.

These changes necessitated a number of changes to `select.cc` in order to support this functionality when operating on selections, in particular when combining selections (e.g. by union or difference).
To minimize redundancy, a number of places that previously iterated over `design->modules()` now push the current selection to the design, use `design->selected_modules()`, and then pop the selection when done.

Introduce `RTLIL::NamedObject`, to allow for iterating over all members of a module with a single iterator instead of needing to iterate over wires, cells, memories, and processes separately.
Also implement `Module::selected_{memories, processes, members}()` to match wires and cells methods.  The `selected_members()` method combines each of the other `selected_*()` methods into a single list.
2025-03-14 14:05:39 +13:00
Martin Povišer 6da543a61a
Merge pull request #4818 from povik/macc_v2
Add `$macc_v2`
2025-03-12 22:55:40 +01:00
Emil J. Tywoniak 6c9857403c share: use share.pattern_limit from scratchpad 2025-03-11 14:57:00 +01:00
Emil J. Tywoniak ca9176cd0f share: bail better on too many patterns 2025-03-10 17:55:04 +01:00
Martin Povišer d8a4991289
Merge pull request #4931 from povik/buf-clean
opt_clean, simplemap: Add `$buf` handling
2025-03-10 15:10:17 +01:00
Emil J. Tywoniak 1d773b50a4 opt_merge: fix dangling pointers in known_cells when keep attribute is used 2025-03-10 13:14:06 +01:00
Emil J. Tywoniak 176faae7c9 opt_merge: fix trivial binary regression 2025-03-10 13:14:06 +01:00
Emil J. Tywoniak 8903740147 opt_merge: switch to unordered_set 2025-03-10 13:14:06 +01:00
Emil J. Tywoniak ffc057a89c opt_merge: fix the many collisions case 2025-03-10 13:14:06 +01:00
Emil J. Tywoniak cbb776c626 opt_merge: avoid hashing strings 2025-03-10 13:14:06 +01:00
Emil J 8bb24badf2
Merge pull request #4895 from YosysHQ/emil/fix-share-portbit-infinite-loop
share: fix infinite loop in find_terminal_bits on $mux loop
2025-03-08 13:14:11 +01:00
Martin Povišer 557047fe1e opt_clean, simplemap: Add $buf handling 2025-03-07 16:08:38 +01:00
Emil J 912c93ca0b
share: help message formatting
Co-authored-by: KrystalDelusion <93062060+KrystalDelusion@users.noreply.github.com>
2025-03-03 18:52:05 +01:00
KrystalDelusion 9106d6b3bd
Merge pull request #4881 from YosysHQ/pmgen-pass-restructure
Move passes out of the passes/pmgen folder
2025-03-01 10:22:54 +13:00
Anhijkt de032d2e2a splitcells: change for-loop condition 2025-02-28 23:16:04 +02:00
Anhijkt 9a14ab8d98 splitcells: Fix the assertion bug caused by out-of-bound offset 2025-02-28 13:51:22 +02:00
Martin Povišer bca21c60d8
Merge pull request #4902 from akashlevy/splitcells_aldff_fix
`aldff`s do not get split by `splitcells` pass
2025-02-27 00:56:46 +01:00
Emil J b4a169527d
Merge pull request #4894 from YosysHQ/emil/abstract
Add `abstract` pass for formal verification
2025-02-25 11:16:37 +01:00
Emil J. Tywoniak 07004f1089 abstract: typo? 2025-02-25 00:19:15 +01:00
Emil J. Tywoniak 925c617c52 abstract: add module input -value abstraction 2025-02-18 17:08:45 +01:00
Jannis Harder 212224dfe8 abstract: Add help message 2025-02-18 17:08:45 +01:00
Jannis Harder 2943c2142d abstract: Improve debug logging
Print the port bit instead of the arbitrary representative sigbit to
identify the target of the abstraction operation.
2025-02-18 17:08:45 +01:00
Jannis Harder a0987195f2 abstract: Support slicing of individual wires 2025-02-18 17:08:45 +01:00
Jannis Harder 4766c92e59 abstract: Allow unconditional value and state abstractions
Also improves -enable and -enablen command line handling
2025-02-18 17:08:45 +01:00
Jannis Harder 37aa2e6cd8 abstract: Wire vs port offset confusion bugfix
This fixes the offsets_to_abstract collection in abstract_state so that
it now works the same way as in abstract_value which was already
correct.
2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 28c768e7b8 abstract: better present changes done 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 3dd697fc8a abstract: improve -init logging 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 9de890c874 abstract: fix -init log_debug bit count, remove unnecessary log_debug 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak aca4d44a40 abstract: improve debug logs for -state and -value 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak cee06cecd0 abstract: factor out emit_mux_anyseq 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 9895370b32 abstract: rework -init without bufnorm, with logging 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 1646991092 abstract: refactor -value 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak e9bba13a0d abstract: no more bufnorm, -value has bit selection consistent with -state, -init temporarily gutted 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 3f1ee3e0ae abstract: -state refactor sigbit rep pool collection 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 387d0de383 abstract: -state allow partial abstraction, don't use buffer-normalized mode 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 6027030215 abstract: -value MVP, use buffer-normalized mode 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 4637fa74e3 abstract: -init MVP 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak e4ca7b8846 abstract: -state MVP 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 8968986b54 share: add -pattern-limit to set analysis effort on branch-unbranch mux regions 2025-02-14 21:13:07 +01:00
Akash Levy 3676429634 aldffs do not get split by splitcells 2025-02-14 10:53:51 -08:00
Krystine Sherwin 4c728968a3
Fix runtime error on shr INT_MAX 2025-02-14 14:01:36 +13:00
Emil J df3c62a4ed
Merge pull request #4892 from YosysHQ/emil/fix-memory-libmap-dangling-cells
memory_libmap: update indices on design modification
2025-02-12 10:21:01 +01:00
Emil J. Tywoniak 01d2bfcf00 share: fix infinite loop in find_terminal_bits on $mux loop 2025-02-12 10:16:44 +01:00
Emil J. Tywoniak 55b60dca95 memory_libmap: update indices on design modification 2025-02-11 13:32:34 +01:00
Martin Povišer fc88ea360e
Merge pull request #4876 from gadfort/segfault-lexer
liberty expression lexer check if characters are found and use size if not for `pin()`
2025-02-07 20:24:08 +01:00
Martin Povišer 772b9c0cfd
Merge pull request #4691 from hovind/experiments/extract-fa-fix
extract_fa: Fix `xor3`/`xnor3` inversion bug
2025-02-06 21:12:32 +01:00
Martin Povišer b5752dfe16 alumacc: Fix missing signedness check 2025-02-04 13:05:53 +01:00
Adrian Parvin Ouano 23b3638c1e alumacc: alternative cmp unification implementation 2025-02-04 11:52:37 +01:00
Krystine Sherwin 0ec5f1b756
pmgen: Move passes out of pmgen folder
- Techlib pmgens are now in relevant techlibs/*.
- `peepopt` pmgens are now in passes/opt.
- `test_pmgen` is still in passes/pmgen.
- Update `Makefile.inc` and `.gitignore` file(s) to match new `*_pm.h` location,
  as well as the `#include`s.
- Change default `%_pm.h` make target to `techlibs/%_pm.h` and move it to the
  top level Makefile.
- Update pmgen target to use `$(notdir $*)` (where `$*` is the part of the file
  name that matched the '%' in the target) instead of `$(subst _pm.h,,$(notdir
  $@))`.
2025-01-31 15:18:28 +13:00
Øystein Hovind ed076bc168 extract_fa: Invert xor3/xnor3 output when inverting majority3 input 2025-01-30 18:45:07 +01:00
Emil J. Tywoniak c2691207df wreduce: fix warning for deprecated IdString::in(pool<IdString>) 2025-01-30 12:01:30 +01:00
Peter Gadfort 9534f4ab80 check if characters are found and use size if not 2025-01-29 15:56:05 -05:00
Martin Povišer 6c76dcec3e macc_v2: Fix v2 omissions 2025-01-27 13:08:44 +01:00
Martin Povišer 61450e8b6e Update codebase for macc_v2 2025-01-24 12:38:03 +01:00
Martin Povišer c5fd96ebb0 macc_v2: Start new cell 2025-01-24 12:38:03 +01:00
Peter Gadfort 66545caa1b Merge branch 'main' into synth-flatten 2025-01-20 10:24:38 -07:00
Peter Gadfort f0860459ac add support for using scratchpad value for flatten.separator in flatten command 2025-01-18 10:45:19 -07:00
N. Engelhardt a5ba1d2eba fix bugs in handling last id in hdlname to scopename conversion 2025-01-16 12:57:08 +01:00
N. Engelhardt d640157ec4 fix some cases of hdlname being added to objects with private names 2025-01-15 15:56:42 +01:00
Emil J. Tywoniak a58481e9b7 mark all hash_into methods nodiscard 2025-01-14 12:39:15 +01:00
Martin Povišer 6225abec71
Merge pull request #4839 from mikesinouye/separator
Add option for a custom flatten block separator char
2025-01-13 15:51:31 +01:00
Larry Doolittle 27be9a6b77 keep_hierarchy.cc: use strictly correct syntax for printf of uint64_t values
Removes two warnings from the compile, at least on amd64 arch
2025-01-10 14:03:09 -08:00
mikesinouye 13b183c9c5
Add option for a custom flatten block separator char 2025-01-09 18:30:23 -08:00
Martin Povišer ca0ace66bc
Merge pull request #4817 from povik/macc_v2-1
macc: Stop using the B port
2025-01-08 14:42:51 +01:00
Martin Povišer 366e3f22fb
Merge pull request #4836 from YosysHQ/emil/share-fix-log
share: fix misleading 0 cells log message
2025-01-08 13:14:34 +01:00
Martin Povišer 652a1b9806 macc: Stop using the B port
The B port is for single-bit summands. These can just as well be
represented as an additional summand on the A port (which supports
summands of arbitrary width). An upcoming `$macc_v2` cell won't be
special-casing single-bit summands in any way.

In preparation, make the following changes:

 * remove the `bit_ports` field from the `Macc` helper (instead add any
   single-bit summands to `ports` next to other summands)

 * leave `B` empty on cells emitted from `Macc::to_cell`
2025-01-08 13:03:35 +01:00
Emil J. Tywoniak 1836a571c9 share: fix misleading log message 2025-01-07 19:25:15 +01:00
Martin Povišer 41e4aa8f0a
Merge pull request #4819 from povik/wreduce-resign
wreduce: Optimize signedness when possible
2025-01-06 15:27:55 +01:00