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https://github.com/YosysHQ/yosys
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sdc: simple mode, remove per-tool stubs
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parent
05f2ce2f4b
commit
769ebf4cb1
2 changed files with 58 additions and 237 deletions
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@ -12,6 +12,10 @@ PRIVATE_NAMESPACE_BEGIN
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struct SdcObjects {
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enum GetterMode {
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Simple,
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Full
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} mode;
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std::vector<std::string> design_ports;
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std::vector<std::pair<std::string, Cell*>> design_cells;
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std::vector<std::pair<std::string, Cell*>> design_pins;
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@ -158,6 +162,8 @@ struct MatchConfig {
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};
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static bool matches(std::string name, const std::string& pat, const MatchConfig& config) {
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(void)config;
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// TODO implement full mode
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return name == pat;
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}
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@ -192,10 +198,19 @@ static int sdc_get_pins_cmd(ClientData data, Tcl_Interp *interp, int objc, Tcl_O
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for (; i < objc; i++) {
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patterns.push_back(Tcl_GetString(objv[i]));
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}
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if (objects->mode == SdcObjects::GetterMode::Simple) {
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if (regexp_flag || hierarchical_flag || nocase_flag || separator != "/" || of_objects) {
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log_error("get_pins got unexpected flags in simple mode\n");
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}
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if (patterns.size() != 1) {
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log_error("get_pins got unexpected number of patterns in simple mode\n");
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}
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}
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MatchConfig config(regexp_flag, nocase_flag, hierarchical_flag);
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std::vector<std::pair<std::string, Cell*>> resolved;
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for (auto pat : patterns) {
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log("get_pins sniffs %s\n", pat.c_str());
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bool found = false;
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for (auto [name, pin] : objects->design_pins) {
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if (matches(name, pat, config)) {
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@ -211,10 +226,6 @@ static int sdc_get_pins_cmd(ClientData data, Tcl_Interp *interp, int objc, Tcl_O
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Tcl_ListObjAppendElement(interp, result, Tcl_NewStringObj(obj.first.c_str(), obj.first.size()));
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objects->constrained_pins.insert(obj);
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}
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(void)hierarchical_flag;
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(void)regexp_flag;
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(void)nocase_flag;
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(void)of_objects;
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if (separator != "/") {
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Tcl_SetResult(interp, (char *)"Only '/' accepted as separator", TCL_STATIC);
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@ -242,6 +253,14 @@ static int sdc_get_ports_cmd(ClientData data, Tcl_Interp *interp, int objc, Tcl_
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for (; i < objc; i++) {
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patterns.push_back(Tcl_GetString(objv[i]));
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}
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if (objects->mode == SdcObjects::GetterMode::Simple) {
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if (regexp_flag || nocase_flag) {
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log_error("get_ports got unexpected flags in simple mode\n");
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}
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if (patterns.size() != 1) {
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log_error("get_ports got unexpected number of patterns in simple mode\n");
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}
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}
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MatchConfig config(regexp_flag, nocase_flag, false);
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std::vector<std::string> resolved;
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for (auto pat : patterns) {
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@ -260,8 +279,7 @@ static int sdc_get_ports_cmd(ClientData data, Tcl_Interp *interp, int objc, Tcl_
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Tcl_ListObjAppendElement(interp, result, Tcl_NewStringObj(obj.c_str(), obj.size()));
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objects->constrained_ports.insert(obj);
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}
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(void)regexp_flag;
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(void)nocase_flag;
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Tcl_SetObjResult(interp, result);
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return TCL_OK;
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}
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@ -301,17 +319,33 @@ struct SdcPass : public Pass {
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// TODO help
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SdcPass() : Pass("sdc", "sniff at some SDC") { }
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void execute(std::vector<std::string> args, RTLIL::Design *design) override {
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if (args.size() < 2)
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log_cmd_error("Missing SDC file.\n");
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// if (args.size() < 2)
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// log_cmd_error("Missing SDC file.\n");
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// TODO optional extra stub file
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size_t argidx;
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std::vector<std::string> opensta_stubs_paths;
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for (argidx = 1; argidx < args.size(); argidx++) {
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if (args[argidx] == "-stubs" && argidx+1 < args.size()) {
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opensta_stubs_paths.push_back(args[++argidx]);
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continue;
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}
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break;
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}
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if (argidx >= args.size())
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log_cmd_error("Missing SDC file.\n");
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std::string sdc_path = args[argidx];
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SDCInterpreter& sdc = SDCInterpreter::get();
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Tcl_Interp *interp = sdc.fresh_interp(design);
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Tcl_Preserve(interp);
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std::string stub_path = "+/sdc/stubs.sdc";
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rewrite_filename(stub_path);
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if (Tcl_EvalFile(interp, stub_path.c_str()) != TCL_OK)
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log_cmd_error("SDC interpreter returned an error in stub file: %s\n", Tcl_GetStringResult(interp));
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if (Tcl_EvalFile(interp, args[1].c_str()) != TCL_OK)
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log_cmd_error("SDC interpreter returned an error in stub preamble file: %s\n", Tcl_GetStringResult(interp));
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for (auto path : opensta_stubs_paths)
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if (Tcl_EvalFile(interp, path.c_str()) != TCL_OK)
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log_cmd_error("SDC interpreter returned an error in OpenSTA stub file %s: %s\n", path.c_str(), Tcl_GetStringResult(interp));
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if (Tcl_EvalFile(interp, sdc_path.c_str()) != TCL_OK)
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log_cmd_error("SDC interpreter returned an error: %s\n", Tcl_GetStringResult(interp));
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sdc.objects->dump();
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Tcl_Release(interp);
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@ -1,234 +1,21 @@
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# with Tcl's eager evaluation, we will still eval args if they're unused by a stub
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proc stub {function_name} {
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proc $function_name {args} {}
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proc $function_name {args} "puts \"stubbed $function_name\""
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}
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# OpenROAD
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proc get_name {thing} {
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return thing
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}
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proc get_full_name {thing} {
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return thing
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proc is_suppressed {args} {
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return 0
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}
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proc create_clock {args} {
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return "CLOCK@"
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}
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proc get_clocks {args} {
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return "CLOCK@"
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}
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# Vivado UG903
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stub add_cells_to_pblock
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stub add_to_power_rail
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stub all_clocks
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stub all_cpus
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stub all_dsps
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stub all_fanin
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stub all_fanout
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stub all_ffs
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stub all_hsios
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stub all_inputs
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stub all_latches
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stub all_outputs
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stub all_rams
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stub all_registers
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stub connect_debug_port
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stub create_clock
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stub create_debug_core
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stub create_debug_port
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stub create_generated_clock
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stub create_macro
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stub create_pblock
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stub create_power_rail
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stub create_property
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stub create_waiver
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stub current_design
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stub current_instance
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stub delete_macros
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stub delete_pblock
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stub delete_power_rails
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stub endgroup
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stub get_bel_pins
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stub get_bels
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stub get_clocks
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stub get_debug_cores
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stub get_debug_ports
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stub get_generated_clocks
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stub get_hierarchy_separator
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stub get_iobanks
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stub get_macros
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stub get_nodes
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stub get_package_pins
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stub get_path_groups
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stub get_pblocks
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stub get_pips
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stub get_pkgpin_bytegroups
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stub get_pkgpin_nibbles
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stub get_power_rails
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stub get_property
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stub get_site_pins
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stub get_site_pips
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stub get_sites
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stub get_slrs
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stub get_speed_models
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stub get_tiles
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stub get_timing_arcs
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stub group_path
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stub make_diff_pair_ports
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stub remove_cells_from_pblock
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stub remove_from_power_rail
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stub reset_operating_conditions
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stub reset_switching_activity
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stub resize_pblock
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stub set_bus_skew
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stub set_case_analysis
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stub set_clock_groups
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stub set_clock_latency
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stub set_clock_sense
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stub set_clock_uncertainty
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stub set_data_check
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stub set_disable_timing
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stub set_external_delay
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stub set_false_path
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stub set_hierarchy_separator
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stub set_input_delay
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stub set_input_jitter
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stub set_load
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stub set_logic_dc
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stub set_logic_one
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stub set_logic_unconnected
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stub set_logic_zero
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stub set_max_delay
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stub set_max_time_borrow
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stub set_min_delay
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stub set_multicycle_path
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stub set_operating_conditions
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stub set_output_delay
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stub set_package_pin_val
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stub set_power_opt
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stub set_propagated_clock
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stub set_property
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stub set_switching_activity
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stub set_system_jitter
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stub set_units
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stub startgroup
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stub update_macro
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# OpenSTA
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stub source_
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stub write_sdc
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stub current_instance
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stub set_hierarchy_separator
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stub check_path_divider
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stub set_units
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stub check_unit
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stub unit_prefix_scale
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stub check_unit_scale
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stub all_clocks
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stub all_inputs
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stub all_outputs
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stub all_registers
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stub current_design
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stub filter_objs
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stub check_nocase_flag
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stub find_liberty_libraries_matching
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stub create_clock
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stub delete_clock
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stub create_generated_clock
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stub delete_generated_clock
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stub remove_gclk_cmd
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stub group_path
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stub check_exception_pins
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stub set_clock_gating_check
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stub set_clock_gating_check1
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stub set_clock_groups
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stub unset_clock_groups
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stub unset_clk_groups_cmd
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stub set_clock_latency
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stub unset_clock_latency
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stub unset_clk_latency_cmd
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stub set_sense
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stub set_clock_sense
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stub set_clock_sense_cmd1
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stub set_clock_transition
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stub unset_clock_transition
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stub set_clock_uncertainty
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stub unset_clock_uncertainty
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stub unset_clk_uncertainty_cmd
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stub set_data_check
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stub unset_data_check
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stub unset_data_checks_cmd
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stub set_disable_timing
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stub set_disable_timing_instance
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stub parse_disable_inst_ports
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stub port_members
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stub set_disable_timing_cell
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stub parse_disable_cell_ports
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stub unset_disable_timing
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stub unset_disable_cmd
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stub unset_disable_timing_cell
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stub unset_disable_timing_instance
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stub set_false_path
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stub set_ideal_latency
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stub set_ideal_network
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stub set_ideal_transition
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stub set_input_delay
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stub set_port_delay
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stub unset_input_delay
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stub set_max_delay
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stub set_path_delay
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stub set_max_time_borrow
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stub set_min_delay
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stub set_min_pulse_width
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stub set_multicycle_path
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stub unset_path_exceptions
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stub unset_path_exceptions_cmd
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stub set_output_delay
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stub unset_output_delay
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stub unset_port_delay
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stub set_propagated_clock
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stub unset_propagated_clock
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stub set_case_analysis
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stub unset_case_analysis
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stub set_drive
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stub set_driving_cell
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stub port_direction_any_output
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stub set_fanout_load
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stub set_input_transition
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stub set_load
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stub set_logic_dc
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stub set_logic_value
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stub set_logic_one
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stub set_logic_zero
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stub set_max_area
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stub set_max_capacitance
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stub set_capacitance_limit
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stub set_max_fanout
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stub set_fanout_limit
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stub set_max_transition
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stub set_port_fanout_number
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stub set_resistance
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stub set_timing_derate
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stub unset_timing_derate
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stub parse_from_arg
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stub parse_thrus_arg
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stub parse_to_arg
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stub parse_to_arg1
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stub delete_from_thrus_to
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stub parse_comment_key
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stub set_min_capacitance
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stub set_operating_conditions
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stub parse_op_cond
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stub parse_op_cond_analysis_type
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stub set_wire_load_min_block_size
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stub set_wire_load_mode
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stub set_wire_load_model
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stub set_wire_load_selection_group
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stub set_voltage
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stub create_voltage_area
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stub set_level_shifter_strategy
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stub set_level_shifter_threshold
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stub set_max_dynamic_power
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stub set_max_leakage_power
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stub define_corners
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stub set_pvt
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stub set_pvt_min_max
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stub default_operating_conditions
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stub cell_regexp
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stub cell_regexp_hsc
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stub port_regexp
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stub port_regexp_hsc
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stub ys_track_typed_key
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stub ys_track_untyped_key
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stub ys_err_key
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stub ys_err_flag
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