fayalite

simulating circuits with deduced resets works

test.yml #160 -Commit 3abba7f9eb pushed by programmerjake

adding-simulator

2024-11-28 07:57:59 +00:00

5m30s

deduce_resets works!

test.yml #159 -Commit 6446b71afd pushed by programmerjake

#3

2024-11-28 08:07:58 +00:00

16m21s

deduce_resets works!

test.yml #158 -Commit 6446b71afd pushed by programmerjake

adding-simulator

2024-11-28 07:30:00 +00:00

5m30s

working on deduce_resets

test.yml #157 -Commit d744d85c66 pushed by programmerjake

#3

2024-11-27 09:43:26 +00:00

10m16s

working on deduce_resets

test.yml #156 -Commit d744d85c66 pushed by programmerjake

adding-simulator

2024-11-27 09:38:22 +00:00

5m29s

Merge remote-tracking branch 'origin/master' into adding-simulator

test.yml #155 -Commit 9128a84284 pushed by programmerjake

#3

2024-11-27 05:44:21 +00:00

10m9s

Merge remote-tracking branch 'origin/master' into adding-simulator

test.yml #154 -Commit 9128a84284 pushed by programmerjake

adding-simulator

2024-11-27 05:39:23 +00:00

5m27s

working on deduce_resets

test.yml #153 -Commit 546010739a pushed by programmerjake

#3

2024-11-27 05:33:56 +00:00

6m24s

make ClockDomain and Reg generic over reset type

test.yml #151 -Commit 9b5f1218fd pushed by programmerjake

#3

2024-11-27 04:59:06 +00:00

10m8s

make ClockDomain and Reg generic over reset type

test.yml #150 -Commit 9b5f1218fd pushed by programmerjake

adding-simulator

2024-11-27 04:54:10 +00:00

5m28s

Fix SInt::for_value not accounting for sign bit for positive values

test.yml #149 -Commit c45624e3c2 pushed by programmerjake

master

2024-11-27 00:43:35 +00:00

4m55s

Fix SInt::for_value not accounting for sign bit for positive values

test.yml #148 -Commit c45624e3c2 pushed by programmerjake

#5

2024-11-27 00:38:35 +00:00

4m58s

Fix SInt::for_value not accounting for sign bit for positive values

test.yml #147 -Commit c45624e3c2 pushed by programmerjake

fix-sint-for_value

2024-11-27 00:33:37 +00:00

5m3s

working on deduce_resets.rs

test.yml #146 -Commit 7851bf545c pushed by programmerjake

#3

2024-11-26 08:17:48 +00:00

10m1s

working on deduce_resets.rs

test.yml #145 -Commit 7851bf545c pushed by programmerjake

adding-simulator

2024-11-26 08:12:55 +00:00

5m28s

working on deduce_resets

test.yml #144 -Commit 3e3da53bd2 pushed by programmerjake

#3

2024-11-25 08:11:48 +00:00

10m3s

working on deduce_resets

test.yml #143 -Commit 3e3da53bd2 pushed by programmerjake

adding-simulator

2024-11-25 08:06:54 +00:00

5m25s

increase rust version in CI too

test.yml #142 -Commit 9516fe03a1 pushed by programmerjake

#3

2024-11-24 22:57:18 +00:00

10m14s

increase rust version in CI too

test.yml #141 -Commit 9516fe03a1 pushed by programmerjake

adding-simulator

2024-11-24 22:52:16 +00:00

5m28s

WIP adding deduce_resets pass

test.yml #134 -Commit 913baa37e9 pushed by programmerjake

#3

2024-11-23 00:17:51 +00:00

9m46s

WIP adding deduce_resets pass

test.yml #133 -Commit 913baa37e9 pushed by programmerjake

adding-simulator

2024-11-23 00:13:05 +00:00

5m20s

writing VCD for combinatorial circuits works!

test.yml #132 -Commit 11ddbc43c7 pushed by programmerjake

#3

2024-11-21 07:07:55 +00:00

9m47s

writing VCD for combinatorial circuits works!

test.yml #131 -Commit 11ddbc43c7 pushed by programmerjake

adding-simulator

2024-11-21 07:03:08 +00:00

5m16s

always write formal cache json

test.yml #130 -Commit 3ea0d98924 pushed by programmerjake

master

2024-11-21 06:57:52 +00:00

4m55s

writing VCD for combinatorial circuits works!

test.yml #129 -Commit e2653a3245 pushed by programmerjake

#3

2024-11-21 06:47:10 +00:00

9m46s

writing VCD for combinatorial circuits works!

test.yml #128 -Commit e2653a3245 pushed by programmerjake

adding-simulator

2024-11-21 06:42:22 +00:00

5m17s

Add test module exercising formal verification.

test.yml #127 -Commit c1f1a8b749 pushed by programmerjake

master

2024-11-20 21:46:11 +00:00

5m33s

Add test module exercising formal verification.

test.yml #126 -Commit c1f1a8b749 pushed by cesar

#2

2024-11-20 21:40:00 +00:00

5m6s

WIP adding VCD output

test.yml #125 -Commit 16ea6850c8 pushed by programmerjake

#3

2024-11-20 21:32:20 +00:00

5m6s

Add test module exercising formal verification.

test.yml #124 -Commit 39d895764a pushed by cesar

#2

2024-11-20 21:11:40 +00:00

5m8s