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f88346ea37
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implement decoding mtspr/mfspr/mftb
/ test (pull_request) Successful in 31m50s
/ test (push) Successful in 32m14s
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2026-01-28 17:35:09 -08:00 |
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a42b76b468
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implement decoding all rotate instructions
/ test (pull_request) Failing after 27m11s
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2026-01-27 19:18:27 -08:00 |
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130c1b2892
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change CommonMOp to directly contain a generic immediate type
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2026-01-27 17:03:14 -08:00 |
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167bc4b6a6
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implement decoding extswsli[.]
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2026-01-26 19:18:44 -08:00 |
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faa8dde774
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reduce the number of wires to have one per form/field pair instead of one per insn/field pair
/ test (pull_request) Successful in 30m9s
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2026-01-26 16:11:03 -08:00 |
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1db65ae753
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implement decoding shifts: s[lr][wd][.] and sra[wd][i][.]
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2026-01-26 15:14:26 -08:00 |
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59874b9b29
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add shift/rotate MOp definition
/ test (pull_request) Successful in 29m25s
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2026-01-25 20:34:38 -08:00 |
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2ad469e331
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simplify getting IMM_WIDTH for LogicalFlagsMOpImm
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2026-01-25 20:25:25 -08:00 |
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0824b63d31
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implement decoding 8/16/32/64-bit store instructions -- all of Power ISA v3.1c Book I 3.3.3
/ test (pull_request) Successful in 27m59s
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2026-01-25 15:06:14 -08:00 |
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706d54ae0d
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implement decoding 8/16/32/64-bit load instructions -- all of Power ISA v3.1C Book I 3.3.2
/ test (pull_request) Successful in 28m7s
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2026-01-23 16:06:16 -08:00 |
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d361a2b578
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make LogicalFlagsMOp also copy the dest PRegValue.flags into PRegValue.int_fp
/ test (pull_request) Successful in 27m15s
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2026-01-23 12:13:06 -08:00 |
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aa07e24c78
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make check-copyright.sh also handle other tests/.../expected/... files
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2026-01-23 12:13:06 -08:00 |
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29757a568c
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implement decoding mcrf
/ test (pull_request) Failing after 17s
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2026-01-23 11:47:06 -08:00 |
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33529a2296
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implement decoding condition register logical instructions
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2026-01-23 11:27:48 -08:00 |
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5e9d0957f6
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reorder the decoder test cases to match the PowerISA v3.1C PDF
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2026-01-23 09:46:29 -08:00 |
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fc8a6cd959
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split up tests/simple_power_isa_decoder into separate modules
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2026-01-23 09:38:45 -08:00 |
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87112c681a
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move simple_power_isa_decoder integration test into its own folder
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2026-01-23 08:46:28 -08:00 |
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e6f876f9af
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fix & clean up MOp definitions and ensure_reg_fields_are_in_the_same_place
/ test (pull_request) Successful in 28m22s
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2026-01-22 08:28:02 -08:00 |
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9b8d99e9af
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implement decoding mcrxrx
/ test (pull_request) Failing after 18m41s
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2026-01-22 07:34:53 -08:00 |
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ffc3d4283c
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refactor PRegFlags to use view structs instead of a long list of accessor methods
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2026-01-20 19:07:46 -08:00 |
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0433e4f8f1
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mark .vcd files as generated
/ test (pull_request) Successful in 27m0s
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2026-01-20 16:20:40 -08:00 |
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a93dca25ac
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extract lut out into separate Lut4 type and add test
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2026-01-20 16:03:28 -08:00 |
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85ada6e55a
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add tests for and fix decoding branch instructions
/ test (pull_request) Successful in 27m1s
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2026-01-19 22:38:48 -08:00 |
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2e05329c36
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add branch instructions, no tests yet
/ test (pull_request) Successful in 27m31s
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2026-01-19 20:09:21 -08:00 |
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1fc56e02f9
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decode exts[bhw][.] and pnop
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2026-01-19 15:41:56 -08:00 |
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aa85ecab01
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simplify tests/simple_power_isa_decoder::test_cases somewhat
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2026-01-19 14:16:00 -08:00 |
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62a330ed4d
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update reg_alloc.vcd
/ test (pull_request) Successful in 27m28s
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2026-01-18 23:23:54 -08:00 |
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c9a3de19b7
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add test that UnitMOp has all the register fields aligned across the different variants
/ test (pull_request) Failing after 27m1s
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2026-01-18 22:50:38 -08:00 |
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7ebcd5de1e
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decode bitwise logic instructions; also nop and mr special cases
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2026-01-18 19:12:48 -08:00 |
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3a35a698e2
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decode fixed-point compare instructions
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2026-01-18 16:37:00 -08:00 |
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a4b052f5f3
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decode all fixed-point add/sub instructions other than addex
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2026-01-18 15:02:15 -08:00 |
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62512960c3
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decode some more add instructions
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2026-01-15 16:10:03 -08:00 |
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b7b6a02777
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decodes an addi instruction
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2026-01-14 21:41:25 -08:00 |
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6d40eaadb3
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WIP adding simple power isa decoder
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2026-01-12 07:10:58 -08:00 |
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305d7b0ae6
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rename src/powerisa.rs -> src/powerisa_instructions_xml.rs
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2026-01-12 03:31:06 -08:00 |
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