implement decoding mcrf

crates/cpu/src/decoder/simple_power_isa.rs

@@ -183,6 +183,8 @@ macro_rules! impl_fields {
 impl_fields! {
     #[name = "BF"]
     struct FieldBF(FieldCrf);
+    #[name = "BFA"]
+    struct FieldBFA(FieldCrf);
     #[name = "BA"]
     struct FieldBA(FieldCrBit);
     #[name = "BB"]
@@ -713,6 +715,24 @@ impl DecodeState {
             );
         });
     }
+    // for mcrf
+    #[hdl]
+    fn decode_mcrf(&mut self) {
+        self.decode_scope(|this, (FieldBF(bf), FieldBFA(bfa))| {
+            connect(
+                ArrayVec::len(this.output),
+                1usize.cast_to_static::<Length<_>>(),
+            );
+            connect(
+                this.output[0],
+                MoveRegMOp::move_reg(
+                    MOpDestReg::new([crf(bf)], []),
+                    [crf(bfa).value],
+                    0i8.cast_to_static::<SInt<_>>(),
+                ),
+            );
+        });
+    }
     #[hdl]
     fn decode_addi_paddi(&mut self) {
         match self.mnemonic {
@@ -1483,9 +1503,7 @@ const DECODE_FNS: &[(&[&str], DecodeFn)] = &[
         ],
         DecodeState::decode_crand_crnand_cror_crxor_crnor_creqv_crandc_crorc,
     ),
-    (&["mcrf"], |_state| {
-        // TODO
-    }),
+    (&["mcrf"], DecodeState::decode_mcrf),
     (&["sc", "scv"], |_state| {
         // TODO
     }),

crates/cpu/tests/simple_power_isa_decoder/test_cases/condition_register.rs

@@ -3,9 +3,10 @@
 
 use crate::test_cases::{TestCase, insn_single};
 use cpu::{
-    instruction::{LogicalFlagsMOp, LogicalFlagsMOpImm, Lut4, MOpDestReg, MOpRegNum},
+    instruction::{LogicalFlagsMOp, LogicalFlagsMOpImm, Lut4, MOpDestReg, MOpRegNum, MoveRegMOp},
     register::PRegFlagsPowerISA,
 };
+use fayalite::prelude::*;
 
 /// covers instructions in PowerISA v3.1C Book I 2.5 Condition Register Instructions
 pub fn test_cases_book_i_2_5_condition_register(retval: &mut Vec<TestCase>) {
@@ -82,4 +83,21 @@ pub fn test_cases_book_i_2_5_condition_register(retval: &mut Vec<TestCase>) {
     cr_bit_logical_op!("creqv", 0x4c000242, Lut4::from_fn(|a, b| a == b));
     cr_bit_logical_op!("crandc", 0x4c000102, Lut4::from_fn(|a, b| a & !b));
     cr_bit_logical_op!("crorc", 0x4c000342, Lut4::from_fn(|a, b| a | !b));
+    macro_rules! mcrf {
+        ($dest:literal, $src:literal; $encoding:literal) => {
+            retval.push(insn_single(
+                concat!("mcrf ", $dest, ", ", $src),
+                $encoding,
+                None,
+                MoveRegMOp::move_reg(
+                    MOpDestReg::new_sim(&[MOpRegNum::power_isa_cr_reg_num($dest)], &[]),
+                    [MOpRegNum::power_isa_cr_reg_imm($src).value],
+                    0i8.cast_to_static::<SInt<_>>(),
+                ),
+            ));
+        };
+    }
+    mcrf!(0, 0; 0x4c000000);
+    mcrf!(5, 7; 0x4e9c0000);
+    mcrf!(5, 0; 0x4e800000);
 }