programmerjake
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  • Joined on 2024-07-08
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programmerjake pushed to decode-and-test-harness at programmerjake/cpu 2026-06-05 08:38:06 +00:00
9cc556c988 WIP: add test_power_isa_add_sim
1bc59716c5 tests/units_formal::test_power_isa_add_formal: formal proof actually starts, though it fails BMC
70bd4ae851 update fayalite
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programmerjake merged pull request libre-chip/fayalite#77 2026-06-05 08:08:47 +00:00
reimplement fayalite::formal and add support to the simulator
programmerjake pushed to master at libre-chip/fayalite 2026-06-05 08:08:47 +00:00
ffca1a279d switch ready_valid::queue formal proofs to use formal_global_clock
d4d9706798 reimplement fayalite::formal and add support to the simulator
5d68885eaf fayalite::testing: add checked_vcd_output!()
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programmerjake deleted branch simulate-formal-inputs from programmerjake/fayalite 2026-06-05 08:08:47 +00:00
programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-05 07:57:22 +00:00
ffca1a279d switch ready_valid::queue formal proofs to use formal_global_clock
d4d9706798 reimplement fayalite::formal and add support to the simulator
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programmerjake created pull request libre-chip/fayalite#77 2026-06-05 07:48:57 +00:00
reimplement fayalite::formal and add support to the simulator
programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-05 07:47:46 +00:00
e7ee1e862e switch ready_valid::queue formal proofs to use formal_global_clock
5c594cbb68 reimplement fayalite::formal and add support to the simulator
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programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-05 07:43:25 +00:00
de548ba7ca switch ready_valid::queue formal proofs to use formal_global_clock
b0a17bdbe2 reimplement fayalite::formal and add support to the simulator
5d68885eaf fayalite::testing: add checked_vcd_output!()
Compare 3 commits »
programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-05 07:27:27 +00:00
e4b886b9b4 reimplement fayalite::formal and add support to the simulator
programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-05 03:12:00 +00:00
1d218887aa WIP: reimplement fayalite::formal and add support to the simulator
programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-05 03:10:04 +00:00
3c8897c890 WIP: reimplement fayalite::formal and add support to the simulator
programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-04 07:04:16 +00:00
b9f0d64fd3 WIP: reimplement fayalite::formal and add support to the simulator
programmerjake created branch simulate-formal-inputs in programmerjake/fayalite 2026-06-03 10:54:59 +00:00
programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-03 10:54:59 +00:00
00b65ae57a WIP: reimplement fayalite::formal and add support to the simulator
31353862ce fayalite/src/module: check that expressions are visible where they are used, e.g. erroring when a wire is inside an if but used outside.
b1116c4a1a simplify_enums: cache folded expressions
6902aea3a6 firrtl: don't generate as many duplicate wires when compiling expressions
1880ed682f speed up TraceAsString by caching the canonical type for can_substitute_type
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programmerjake pushed to decode-and-test-harness at programmerjake/cpu 2026-06-02 08:39:20 +00:00
241255e12c tests/units_formal::test_power_isa_add_formal: formal proof actually starts, though it fails BMC
14df664277 update fayalite
f5d8486d81 decoder/simple_power_isa: fix wires being used outside of the if they're declared in, also add TraceAsString
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programmerjake pushed to master at libre-chip/fayalite 2026-06-02 08:31:38 +00:00
31353862ce fayalite/src/module: check that expressions are visible where they are used, e.g. erroring when a wire is inside an if but used outside.
b1116c4a1a simplify_enums: cache folded expressions
6902aea3a6 firrtl: don't generate as many duplicate wires when compiling expressions
1880ed682f speed up TraceAsString by caching the canonical type for can_substitute_type
Compare 4 commits »
programmerjake deleted branch optimize-more from programmerjake/fayalite 2026-06-02 08:31:38 +00:00
programmerjake merged pull request libre-chip/fayalite#76 2026-06-02 08:31:37 +00:00
Add more caching, reduce the number of duplicate wires in generated FIRRTL, and make Module verification check that expressions are visible
programmerjake created pull request libre-chip/fayalite#76 2026-06-02 08:26:07 +00:00
Add more caching, reduce the number of duplicate wires in generated FIRRTL, and make Module verification check that expressions are visible
programmerjake pushed to optimize-more at programmerjake/fayalite 2026-06-02 06:14:18 +00:00
31353862ce fayalite/src/module: check that expressions are visible where they are used, e.g. erroring when a wire is inside an if but used outside.
b1116c4a1a simplify_enums: cache folded expressions
Compare 2 commits »