programmerjake
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  • Joined on 2024-07-08
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programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-04 07:04:16 +00:00
b9f0d64fd3 WIP: reimplement fayalite::formal and add support to the simulator
programmerjake created branch simulate-formal-inputs in programmerjake/fayalite 2026-06-03 10:54:59 +00:00
programmerjake pushed to simulate-formal-inputs at programmerjake/fayalite 2026-06-03 10:54:59 +00:00
00b65ae57a WIP: reimplement fayalite::formal and add support to the simulator
31353862ce fayalite/src/module: check that expressions are visible where they are used, e.g. erroring when a wire is inside an if but used outside.
b1116c4a1a simplify_enums: cache folded expressions
6902aea3a6 firrtl: don't generate as many duplicate wires when compiling expressions
1880ed682f speed up TraceAsString by caching the canonical type for can_substitute_type
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programmerjake pushed to decode-and-test-harness at programmerjake/cpu 2026-06-02 08:39:20 +00:00
241255e12c tests/units_formal::test_power_isa_add_formal: formal proof actually starts, though it fails BMC
14df664277 update fayalite
f5d8486d81 decoder/simple_power_isa: fix wires being used outside of the if they're declared in, also add TraceAsString
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programmerjake pushed to master at libre-chip/fayalite 2026-06-02 08:31:38 +00:00
31353862ce fayalite/src/module: check that expressions are visible where they are used, e.g. erroring when a wire is inside an if but used outside.
b1116c4a1a simplify_enums: cache folded expressions
6902aea3a6 firrtl: don't generate as many duplicate wires when compiling expressions
1880ed682f speed up TraceAsString by caching the canonical type for can_substitute_type
Compare 4 commits »
programmerjake deleted branch optimize-more from programmerjake/fayalite 2026-06-02 08:31:38 +00:00
programmerjake merged pull request libre-chip/fayalite#76 2026-06-02 08:31:37 +00:00
Add more caching, reduce the number of duplicate wires in generated FIRRTL, and make Module verification check that expressions are visible
programmerjake created pull request libre-chip/fayalite#76 2026-06-02 08:26:07 +00:00
Add more caching, reduce the number of duplicate wires in generated FIRRTL, and make Module verification check that expressions are visible
programmerjake pushed to optimize-more at programmerjake/fayalite 2026-06-02 06:14:18 +00:00
31353862ce fayalite/src/module: check that expressions are visible where they are used, e.g. erroring when a wire is inside an if but used outside.
b1116c4a1a simplify_enums: cache folded expressions
Compare 2 commits »
programmerjake created branch optimize-more in programmerjake/fayalite 2026-06-02 03:54:26 +00:00
programmerjake pushed to optimize-more at programmerjake/fayalite 2026-06-02 03:54:26 +00:00
6902aea3a6 firrtl: don't generate as many duplicate wires when compiling expressions
1880ed682f speed up TraceAsString by caching the canonical type for can_substitute_type
cf3e6cfc6b Add .to_trace_as_string() and clean up code
ea183eac87 add TraceAsString<T> -- sim traces it as a string rather than all its internal fields
26224abe1c sim: properly update all VCD wires when they share simulation state
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programmerjake created pull request libre-chip/cpu#15 2026-06-01 08:11:18 +00:00
WIP: add cpu::test::decode_and_run_single_insn and some formal tests of running PowerISA instructions
programmerjake pushed to decode-and-test-harness at programmerjake/cpu 2026-06-01 08:04:18 +00:00
93e948115d added test::decode_and_run_single_insn and tests/units_formal, the new test takes a long time to run so idk if it works
programmerjake deleted branch tp/rebase2 from libre-chip/fayalite 2026-06-01 06:21:19 +00:00
programmerjake pushed to decode-and-test-harness at programmerjake/cpu 2026-06-01 03:31:28 +00:00
c8a4c576d3 WIP: adding test::decode_and_run_single_insn
29622be160 ExecuteToUnitInterface: add guarantee that if unit_outputs_ready is false, then enqueue.data is HdlNone
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programmerjake pushed to decode-and-test-harness at programmerjake/cpu 2026-05-30 03:07:12 +00:00
a63d2990ef WIP: adding test::decode_and_run_single_insn
programmerjake created branch decode-and-test-harness in programmerjake/cpu 2026-05-29 08:33:31 +00:00
programmerjake pushed to decode-and-test-harness at programmerjake/cpu 2026-05-29 08:33:31 +00:00
93598dc6d1 WIP: adding test::decode_and_run_single_insn
7fc205e583 ArrayVec::map: actually connect to all output elements
9cecc6aaa0 rename_execute_retire::MOpInstance: use FETCH_BLOCK_ID_WIDTH
7acfaebfde unit::alu_branch::compare: implement CmpRBOne/CmpRBTwo/CmpEqB
7481d079d5 redo ShiftRotateMOp and write actual operation definition in doc comment
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programmerjake deleted branch more-alu-branch from programmerjake/cpu 2026-05-29 02:23:11 +00:00
programmerjake merged pull request libre-chip/cpu#14 2026-05-29 02:23:10 +00:00
implement more instructions in unit::alu_branch