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5823 commits

Author SHA1 Message Date
nella
94a215b4f7 Add dont_use_cells to scl cache. 2026-04-23 12:43:43 +02:00
nella
edd3ad525e Add scl caching to abc_new. 2026-04-23 12:43:43 +02:00
nella
9143178343 Merge liberty files into stripped scl files. 2026-04-23 12:43:43 +02:00
N. Engelhardt
240f7030b2 xprop: ignore $scopeinfo cells 2026-04-21 10:52:50 +02:00
Stan Lee
90c2bbe1d4 factor offset 2026-04-20 17:26:30 -07:00
Stan Lee
5f538db621 fix 2026-04-20 17:17:37 -07:00
Stan Lee
f377bb04e4 pull main 2026-04-20 16:57:15 -07:00
Akash Levy
c05efa055b
Merge pull request #155 from Silimate/fork-scope
[CUS-486] Strip $fork scope and N-dim register flattening
2026-04-20 16:43:16 -07:00
Akash Levy
47a5a626e3
Merge pull request #153 from Silimate/reg-rename
[ENG-1918] Handle edge cases in register renaming
2026-04-20 16:40:16 -07:00
Stan Lee
553ea0a173 edit 2026-04-20 16:11:28 -07:00
Stan Lee
5f663796ad oops 2026-04-20 15:22:18 -07:00
Stan Lee
38f97edb45 Merge branch 'main' of github.com:silimate/yosys into fork-scope 2026-04-20 15:21:20 -07:00
Stan Lee
1646f7712a bugfix 2026-04-20 15:12:56 -07:00
Stan Lee
102cbb8c0a splitcells reg split fix 2026-04-20 15:07:09 -07:00
Stan Lee
fb9a64086e undo 2026-04-20 14:47:57 -07:00
Stan Lee
1bc33bc8c5 re-trigger 2026-04-20 14:47:43 -07:00
Stan Lee
63b61f04d0 further remove 2026-04-20 13:42:57 -07:00
Stan Lee
608ed37a6d N-dimensional regs 2026-04-20 13:42:08 -07:00
Akash Levy
78874dfccd
Merge pull request #152 from Silimate/sim
[ENG-1911] Registers should be annotated every cycle in 'sim'
2026-04-20 12:11:49 -07:00
Stan Lee
8653fea875 fix 2026-04-20 09:45:07 -07:00
Stan Lee
9e05fb7606 comments 2026-04-20 09:40:40 -07:00
Akash Levy
8485d57841 opt_expr for constant comparisons 2026-04-20 02:03:35 -07:00
Stan Lee
3b7613d858 guard for multiple drivers 2026-04-19 21:30:12 -07:00
Stan Lee
d4bfebd0da offsets supported in reg_rename 2026-04-19 20:00:09 -07:00
Stan Lee
da1072d77d add flag to toggle reg overwriting 2026-04-17 15:10:40 -07:00
Stan Lee
07ae46f1ea comments and cleanup 2026-04-17 11:31:25 -07:00
Stan Lee
1298607d95 fix compilation err 2026-04-17 10:29:13 -07:00
Stan Lee
e7ffe7a7df override register states 2026-04-17 10:27:45 -07:00
Emil J. Tywoniak
b4c081c70b abc: fix deferred logs 2026-04-17 13:35:47 +02:00
Stan Lee
85fc4fdc0e fix 2026-04-16 15:35:11 -07:00
Stan Lee
2667070cdd huge optimization 2026-04-16 15:27:55 -07:00
Stan Lee
e3ccb51cea cleanup 2026-04-16 12:52:26 -07:00
Stan Lee
dc7958a791 fix 2026-04-15 18:04:53 -07:00
Stan Lee
eeceeb18af reg_rename bug fix 2026-04-15 14:17:57 -07:00
Stan Lee
2dac6a4215 fix 2026-04-15 12:44:53 -07:00
Stan Lee
321ab5d601 working 2026-04-15 11:50:35 -07:00
nella
4506dffa9f Fix use after free. 2026-04-13 12:48:05 +02:00
nella
fc71719e6e Rename csa_tree to arith_tree. 2026-04-13 12:48:05 +02:00
nella
c3c577f333 Fix test cases. 2026-04-13 12:48:05 +02:00
nella
135812ab02 Further CSA cleanup. 2026-04-13 12:48:05 +02:00
nella
847a8941e9 Clang-Format CSA tree. 2026-04-13 12:48:05 +02:00
nella
a02c238874 Consolidate Wallace from booth and CSA. 2026-04-13 12:48:05 +02:00
nella
4bbffecf98 Invert. 2026-04-13 12:48:05 +02:00
nella
42c309347b Clarify. 2026-04-13 12:48:05 +02:00
Emil J. Tywoniak
b6d656e932 csa_tree: move to techmap 2026-04-13 12:48:05 +02:00
Emil J. Tywoniak
b6a8feec22 csa_tree: refactor 2026-04-13 12:48:05 +02:00
nella
67e145618b Replace utf arrow with ascii arrow. 2026-04-13 12:48:05 +02:00
nella
5d90bcc792 CSA add support for macc and alu cells. 2026-04-13 12:48:05 +02:00
nella
335cce4895 Add sub chain support for csa trees. 2026-04-13 12:48:05 +02:00
nella
e69914b8be better balancing. 2026-04-13 12:48:05 +02:00