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2979 commits

Author SHA1 Message Date
Eddie Hung
3e88ede061
Merge pull request #1835 from boqwxp/cleanup_sat_expose 
Clean up pseudo-private member usage in `passes/sat/expose.cc`.
 2020-03-30 13:05:12 -07:00
Eddie Hung
0d878ca256
Merge pull request #1832 from boqwxp/cleanup_passes_cmds_design 
Clean up pseudo-private member usage in `passes/cmds/design.cc`.
 2020-03-30 11:56:17 -07:00
Eddie Hung
2c0739cbad
Merge pull request #1786 from boqwxp/hierarchycc_cleanup 
Clean up pseudo-private member usage in `passes/hierarchy/hierarchy.cc`.
 2020-03-30 11:37:51 -07:00
Eddie Hung
9f7d20a653
Merge pull request #1831 from boqwxp/cleanup_sat_eval 
Clean up pseudo-private member usage in `passes/sat/eval.cc`.
 2020-03-30 11:13:53 -07:00
Eddie Hung
769c7318e7
Merge pull request #1833 from boqwxp/cleanup_sat_freduce 
Clean up pseudo-private member usage in `passes/sat/freduce.cc`.
 2020-03-30 11:13:06 -07:00
Alberto Gonzalez
00544cffab
Remove unused function parameter. 2020-03-30 18:00:19 +00:00
Alberto Gonzalez
5a0f029e23
Simplify iterating over selected modules or cells. 
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
 2020-03-30 17:56:07 +00:00
Alberto Gonzalez
7fc0938bb6
Replace RTLIL::id2cstr() with log_id(). 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-30 16:50:36 +00:00
Alberto Gonzalez
4c92f9380c
Fix double deletion in passes/hierarchy/hierarchy.cc. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-30 16:43:54 +00:00
Alberto Gonzalez
f4faa1514b
Further clean up passes/sat/eval.cc. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-30 16:38:35 +00:00
Alberto Gonzalez
9f265dfd3f
Further clean up passes/sat/freduce.cc. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-30 16:25:30 +00:00
Alberto Gonzalez
696660351f
Clean up more in passes/sat/expose.cc. 
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
 2020-03-30 16:16:16 +00:00
N. Engelhardt
2c847e7efe
Merge pull request #1778 from rswarbrick/sv-defines 
Add support for SystemVerilog-style `define to Verilog frontend
 2020-03-30 13:51:12 +02:00
Miodrag Milanovic
1dbc701728 Explicit include of csignal 2020-03-28 09:49:08 +01:00
Miodrag Milanovic
5cdcd6ec79 windows - there are no stopping signals 2020-03-28 09:09:11 +01:00
Alberto Gonzalez
1197a43380
Clean up pseudo-private member usage in passes/sat/expose.cc. 2020-03-28 06:18:09 +00:00
Alberto Gonzalez
9a0cdc3835
Clean up pseudo-private member usage in passes/sat/freduce.cc. 2020-03-28 06:08:23 +00:00
Alberto Gonzalez
4681f02a6e
Clean up pseudo-private member usage in passes/cmds/design.cc. 2020-03-28 05:10:18 +00:00
Alberto Gonzalez
b63b2dbbc3
Clean up pseudo-private member usage in passes/sat/eval.cc. 2020-03-28 03:11:23 +00:00
Rupert Swarbrick
044ca9dde4 Add support for SystemVerilog-style `define to Verilog frontend 
This patch should support things like

  `define foo(a, b = 3, c)   a+b+c

  `foo(1, ,2)

which will evaluate to 1+3+2. It also spots mistakes like

  `foo(1)

(the 3rd argument doesn't have a default value, so a call site is
required to set it).

Most of the patch is a simple parser for the format in preproc.cc, but
I've also taken the opportunity to wrap up the "name -> definition"
map in a type, rather than use multiple std::map's.

Since this type needs to be visible to code that touches defines, I've
pulled it (and the frontend_verilog_preproc declaration) out into a
new file at frontends/verilog/preproc.h and included that where
necessary.

Finally, the patch adds a few tests in tests/various to check that we
are parsing everything correctly.
 2020-03-27 16:08:26 +00:00
Claire Wolf
590d8eccb7
Merge pull request #1806 from YosysHQ/mwk/techmap-replace-fix 
techmap: Fix cell names with _TECHMAP_REPLACE_.*
 2020-03-26 19:03:37 +01:00
N. Engelhardt
3e46faa58c
Merge pull request #1763 from boqwxp/issue1762 
Closes #1762. Adds warnings for `select` arguments not matching any object and for `add` command when no modules selected
 2020-03-23 20:14:13 +01:00
Alberto Gonzalez
0da65d498b
Do not warn on empty selection with prefixed arg_memb. 
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
 2020-03-23 17:50:11 +00:00
Alberto Gonzalez
ca4e5dd56e
Suppress warnings for empty select arguments when -count or -assert-* options are set. 2020-03-23 17:30:53 +00:00
Marcin Kościelnicki
c2bf11e42a techmap: Fix cell names with _TECHMAP_REPLACE_.* 
Fixes #1804.
 2020-03-23 11:17:07 +01:00
N. Engelhardt
91d12f4d59
Merge pull request #1785 from boqwxp/mitercc_cleanup 
Clean up pseudo-private member usage in `passes/sat/miter.cc`.
 2020-03-23 11:10:39 +01:00
Alberto Gonzalez
5026f36250
Warn on empty selection for add command. 2020-03-23 05:58:12 +00:00
R. Ou
c34969d3f1 iopadmap: Attempt to give new wires/cells meaningful names 2020-03-22 23:01:09 +01:00
Marcin Kościelnicki
e91368a5f4 fsm_extract: Initialize celltypes with full design. 
Fixes #1781.
 2020-03-19 18:51:21 +01:00
N. Engelhardt
e03f725ef2
Merge pull request #1774 from boqwxp/exec 
Add `exec` command to allow running shell commands from inside Yosys scripts
 2020-03-19 13:14:43 +01:00
Alberto Gonzalez
6b626c2b0f
Clean up pseudo-private member usage in passes/sat/miter.cc. 2020-03-19 07:07:22 +00:00
Alberto Gonzalez
b88faceced
Clean up pseudo-private member usage in passes/hierarchy/hierarchy.cc. 2020-03-19 06:49:52 +00:00
Alberto Gonzalez
7ea7fb700b
Update copyright and license header. 
I hereby assign to Claire Wolf the copyright for all work I did on `passes/cmds/exec.cc`.
In the event that this copyright assignment is not legally valid, I offer this work under the ISC license.
 2020-03-18 09:17:31 +00:00
Alberto Gonzalez
cbc5664d37
Clean up exec code according to review. 
Co-Authored-By: Miodrag Milanović <mmicko@gmail.com>
 2020-03-18 09:17:12 +00:00
Claire Wolf
7f5c73d58f Add N:* to select language, fix some old code 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-03-17 18:47:01 +01:00
Eddie Hung
a2fa1654dc
Merge pull request #1769 from boqwxp/select_cleanup 
Clean up code style and pseudo-private member usage in `passes/cmds/select.cc`
 2020-03-17 10:43:45 -07:00
Alberto Gonzalez
9d9bbdce5d
Further clean up passes/cmds/select.cc. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-16 20:35:19 +00:00
Alberto Gonzalez
70093698f5
Cleanup code style and pseudo-private member usage in passes/cmds/select.cc. 2020-03-16 20:35:11 +00:00
Alberto Gonzalez
8ba49a8462
Allow specifying multiple regexes to match in exec command output, and also to specify regexes that must _not_ match. 2020-03-16 07:52:57 +00:00
Alberto Gonzalez
e6c09f1e0e
Add exec command to run shell commands. 2020-03-16 07:52:57 +00:00
Miodrag Milanovic
8f221118d2 Add YS_ prefix to macros, add explanation and apply to older version as well 2020-03-13 17:19:54 +01:00
Miodrag Milanovic
7c54e61979 Use boost xpressive for gcc 4.8 2020-03-13 14:58:35 +01:00
N. Engelhardt
6986371bac
Merge pull request #1751 from boqwxp/add_assert 
Extend `add` command to allow adding $assert cells.
 2020-03-12 11:18:35 +01:00
Eddie Hung
dd8ebf7873
Merge pull request #1743 from YosysHQ/eddie/abc9_keep 
abc9: improve (* keep *) handling
 2020-03-11 06:32:15 -07:00
Alberto Gonzalez
005dd601ab
Extend add command to allow adding cells for verification like $assert, $assume, etc. 2020-03-10 21:49:22 +00:00
David Shah
f2550d45ff
Merge pull request #1753 from YosysHQ/dave/abc9-speedup 
Add ScriptPass::run_nocheck and use for abc9
 2020-03-10 13:51:59 +00:00
David Shah
ddcd87b577
Merge pull request #1721 from YosysHQ/dave/tribuf-unused 
deminout: Don't demote inouts with unused bits
 2020-03-10 13:51:40 +00:00
Alberto Gonzalez
47537f2e42
Clean up passes/cmds/add.cc code style. 2020-03-10 10:37:10 +00:00
David Shah
b8abf14376 Add ScriptPass::run_nocheck and use for abc9 
Signed-off-by: David Shah <dave@ds0.me>
 2020-03-09 14:34:22 +00:00
Eddie Hung
80dcc8a0d1 abc9: for sccs, create a new wire instead of using entirety of existing 2020-03-06 10:30:07 -08:00