Miodrag Milanovic
f2e1ac23a2
add prep
2026-03-13 11:15:21 +01:00
Miodrag Milanovic
413b9a4639
Add common.mk
2026-03-13 11:00:08 +01:00
Miodrag Milanovic
144da16583
report on summary
2026-03-13 10:15:17 +01:00
Miodrag Milanovic
903c74e42b
Look for all result files
2026-03-13 10:10:34 +01:00
Miodrag Milanovic
f9cd49f7b9
Save results, and create summary and report
2026-03-13 09:51:15 +01:00
Miodrag Milanovic
2fb0ca49ff
Convert gen-tests shell script to python
2026-03-13 08:38:05 +01:00
Miodrag Milanovic
486c3715fb
Enabled realmath that was disabled for some reason
2026-03-11 08:02:11 +01:00
Miodrag Milanovic
2123121d23
Fix deprecation warning
2026-03-10 16:15:07 +01:00
Miodrag Milanovic
8a6954413f
Clean some seed-tests outputs
2026-03-10 15:57:24 +01:00
Miodrag Milanovic
ede782d7e3
Clean some seed-tests outputs
2026-03-10 11:50:30 +01:00
Miodrag Milanovic
a155994868
Cleanup for abcopt-tests
2026-03-10 11:18:05 +01:00
Miodrag Milanovic
169b9994dc
Ignore some generated files
2026-03-10 11:05:47 +01:00
Miodrag Milanovic
c08a2aa3ff
Do not write to console for makefile-tests
2026-03-10 11:02:20 +01:00
Miodrag Milanovic
6526e88d14
Propagate ABCOPT and SEEDOPT
2026-03-10 10:15:27 +01:00
Miodrag Milanovic
1a864c72ae
Make sure targets are built for tests
2026-03-10 10:08:52 +01:00
Miodrag Milanovic
108a9133d0
Move clean for tests in proper Makefile
2026-03-10 10:01:23 +01:00
Miodrag Milanovic
92ef719434
Split vanilla-test to separate Makefile
2026-03-10 09:41:39 +01:00
Miodrag Milanović
de99d67bbd
Merge pull request #5733 from YosysHQ/update_abc
...
Update ABC as per 2026-03-09
2026-03-09 12:42:13 +00:00
Miodrag Milanovic
fea0d18c0a
Update ABC as per 2026-03-09
2026-03-09 13:04:45 +01:00
Emil J
2f1cdc2df9
Merge pull request #5728 from povik/tcl-set-result
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Replace deprecated Tcl API to fix use-after-free
2026-03-06 13:36:48 +00:00
Martin Povišer
167c6c4585
Replace deprecated Tcl API to fix use-after-free
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Under Tcl 9.0 the Tcl_SetResult utility is a macro:
#define Tcl_SetResult(interp, result, freeProc) \
do { \
const char *__result = result; \
Tcl_FreeProc *__freeProc = freeProc; \
Tcl_SetObjResult(interp, Tcl_NewStringObj(__result, -1)); \
if (__result != NULL && __freeProc != NULL && __freeProc != TCL_VOLATILE) { \
if (__freeProc == TCL_DYNAMIC) { \
Tcl_Free((char *)__result); \
} else { \
(*__freeProc)((char *)__result); \
} \
} \
} while(0)
Temporaries constructed as part of the 'result' expression will be
dropped before the 'result' pointer is used. What was safe when
Tcl_SetResult was a function isn't safe with the macro definition.
Transition away from deprecated SetResult to calling
SetObjResult/MewStringObj directly.
2026-03-06 11:52:17 +01:00
Lofty
050483a6b2
Merge pull request #5698 from YosysHQ/lofty/analogdevices
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synth_analogdevices: synthesis for Analog Devices EFLX FPGAs [sc-273]
2026-03-06 08:57:59 +00:00
Miodrag Milanovic
602f3fd1a5
Add missing EOL
2026-03-06 09:10:55 +01:00
Miodrag Milanovic
52533b0d1c
Update opt_lut_ins and stat for analogdevices and remove ecp5
2026-03-06 09:10:36 +01:00
Miodrag Milanović
95d738edc0
Merge pull request #5726 from YosysHQ/emil/double-expose-yosys_celltypes
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celltypes: include newcelltypes to allow legacy code access to migrat…
2026-03-05 11:36:36 +00:00
Emil J
629bf3dffd
Merge pull request #5630 from apullin/array-assignment
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ast: Add support for array-to-array assignment
2026-03-05 11:10:12 +00:00
Emil J. Tywoniak
23eb38fe3f
celltypes: include newcelltypes to allow legacy code access to migrated yosys_celltypes
2026-03-05 11:59:20 +01:00
Lofty
da83c93673
analogdevices: fix SHIFTX name
2026-03-05 05:37:13 +00:00
Lofty
f3efa51b3e
analogdevices: fix SHREG name
2026-03-05 05:37:13 +00:00
Lofty
e2e8245be9
analogdevices: fix MUXF78 name
2026-03-05 05:37:13 +00:00
Lofty
c747466a7a
analogdevices: update missed T40LP timings
2026-03-05 05:37:13 +00:00
Lofty
91740645a9
analogdevices: update T40LP timings
2026-03-05 05:37:13 +00:00
Lofty
709746b184
analogdevices: update T16FFC timings
2026-03-05 05:37:13 +00:00
Lofty
cd60dd4912
synth_analogdevices: update timing model and tests
2026-03-05 05:37:13 +00:00
Lofty
241db706e1
analogdevices: double LUT RAM cost
2026-03-05 05:37:13 +00:00
Lofty
3592d42d3b
analogdevices: ignore $assert cells
2026-03-05 05:37:13 +00:00
Krystine Sherwin
5d3ed5a418
analogdevices: Extra tests
...
`mem_gen.py` based on quicklogic tests.
Remove BUFG from `lutram.ys`.
Extra `sync_ram_sp` models in `arch/common/blockram.v`.
Add analogdevices to main makefile tests.
Not all the other tests are passing, but that's fine for now.
2026-03-05 05:37:13 +00:00
Krystine Sherwin
f06018306d
analogdevices: Fixing up bram
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Tested all the accepted configurations in eXpreso, disabling the RBRAM2 configs that fail to place, and increasing the cost for the double site TDP memories.
2026-03-05 05:37:13 +00:00
Krystine Sherwin
95ef0cd788
analogdevices: Add BRAM options
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Enable `-force-params`, and tidy up lutram mapping too.
2026-03-05 05:37:13 +00:00
Lofty
8a09cc5463
analogdevices: LUT RAM only on positive edge
2026-03-05 05:37:13 +00:00
Lofty
dea8c275ff
analogdevices: DSP tweaks
2026-03-05 05:37:12 +00:00
Lofty
39cb61615f
analogdevices: DSP inference
2026-03-05 05:37:12 +00:00
Lofty
891b89f60d
analogdevices: remove cells_xtra
2026-03-05 05:37:12 +00:00
Lofty
4954fc980f
analogdevices: timings for t40lp
2026-03-05 05:37:12 +00:00
Lofty
2c3876671b
analogdevices: use single tech param
2026-03-05 05:37:12 +00:00
Lofty
0a2b6a4f21
analogdevices: expreso does not care about clock buffers
2026-03-05 05:37:12 +00:00
Lofty
6ee0bfa913
analogdevices: prepare for t40lp timings
2026-03-05 05:37:12 +00:00
Krystine Sherwin
9dcffc3dbf
analogdevices: Adding RBRAM2 and -tech
2026-03-05 05:37:12 +00:00
Krystine Sherwin
99e26d80b0
analogdevices: (some) Native BRAM
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Specifically, the SDP configurations for RBRAM (ignoring 2048x09 because it makes the memlib format unhappy).
Drop the unused defines from the synth pass.
Remove comments from the lutram files referencing xilinx.
2026-03-05 05:37:12 +00:00
Krystine Sherwin
9be3cfb3f9
analogdevices: Update lutram.ys test
2026-03-05 05:37:12 +00:00
