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Author SHA1 Message Date
abhinavputhran
c23ba3f917 I think CI runs within the tests directory based on error so I changed the file path 2026-03-08 18:15:35 -04:00
abhinavputhran
5048dac854 setundef: add tests for selection in -zero, -undriven, and -init modes. also made setundef.cc clearer 2026-03-06 18:12:03 -05:00
abhinavputhran
9e666c727f setundef: respect selection in -undriven mode 2026-03-06 10:37:59 -05:00
Emil J
2f1cdc2df9
Merge pull request #5728 from povik/tcl-set-result 
Replace deprecated Tcl API to fix use-after-free
 2026-03-06 13:36:48 +00:00
Martin Povišer
167c6c4585 Replace deprecated Tcl API to fix use-after-free 
Under Tcl 9.0 the Tcl_SetResult utility is a macro:

	#define Tcl_SetResult(interp, result, freeProc) \
		do { \
		    const char *__result = result; \
		    Tcl_FreeProc *__freeProc = freeProc; \
		    Tcl_SetObjResult(interp, Tcl_NewStringObj(__result, -1)); \
		    if (__result != NULL && __freeProc != NULL && __freeProc != TCL_VOLATILE) { \
			if (__freeProc == TCL_DYNAMIC) { \
			    Tcl_Free((char *)__result); \
			} else { \
			    (*__freeProc)((char *)__result); \
			} \
		    } \
		} while(0)

Temporaries constructed as part of the 'result' expression will be
dropped before the 'result' pointer is used. What was safe when
Tcl_SetResult was a function isn't safe with the macro definition.
Transition away from deprecated SetResult to calling
SetObjResult/MewStringObj directly.
 2026-03-06 11:52:17 +01:00
Lofty
050483a6b2
Merge pull request #5698 from YosysHQ/lofty/analogdevices 
synth_analogdevices: synthesis for Analog Devices EFLX FPGAs [sc-273]
 2026-03-06 08:57:59 +00:00
Miodrag Milanovic
602f3fd1a5 Add missing EOL 2026-03-06 09:10:55 +01:00
Miodrag Milanovic
52533b0d1c Update opt_lut_ins and stat for analogdevices and remove ecp5 2026-03-06 09:10:36 +01:00
Robert O'Callahan
9c51ba1b09 Reduce opt_clean parallelism 2026-03-06 02:20:16 +00:00
Robert O'Callahan
8d8c05b338 Fix OptCleanPass usage of CleanRunContext to avoid constructing extra KeepCache and ParallelDispatchThreadPool 2026-03-06 02:20:16 +00:00
Robert O'Callahan
32f5044eaf Clarify "Not passing module as function argument" comment 
This correct in terms of intent, it's just not fully enforced due to const laundering.
 2026-03-06 02:20:16 +00:00
Emil J. Tywoniak
70cc2d67fd opt_clean: refactor 2026-03-06 02:20:14 +00:00
Robert O'Callahan
1260fda83a Add 'init' attributes to RTLIL fuzzing 2026-03-06 02:20:08 +00:00
Robert O'Callahan
cdfc586f18 Add unit tests for ConcurrentWorkQueue 2026-03-06 02:20:08 +00:00
Robert O'Callahan
1e96328ede Add some tests for ShardedHashSet 2026-03-06 02:20:08 +00:00
Robert O'Callahan
3910d569da Add unit tests for ConcurrentQueue and ThreadPool 2026-03-06 02:20:08 +00:00
Robert O'Callahan
ac55935a68 Add unit-tests for ParallelDispatchThread and friends 2026-03-06 02:20:08 +00:00
Robert O'Callahan
3603cd52a0 Pass the module Subpool to rmunused_module_signals and parallelize that function 2026-03-06 02:20:08 +00:00
Robert O'Callahan
7f3b11e56b Add test that connects a wire with init to a constant 2026-03-06 02:20:08 +00:00
Robert O'Callahan
19a7c8fcf3 Pass the module Subpool to rmunused_module_cells and parallelize that function 2026-03-06 02:20:08 +00:00
Robert O'Callahan
8e044d1045 Pass the module Subpool to rmunused_module_init and parallelize that function 2026-03-06 02:20:06 +00:00
Robert O'Callahan
a7437c636d Pass the toplevel thread pool to rmunused_module, create a Subpool, and parallelize remove_temporary_cells 2026-03-06 02:05:46 +00:00
Robert O'Callahan
887c32cb54 Create a toplevel ParallelDispatchThreadPool and parallelize keep_cache_t::scan_module() with it 2026-03-06 02:05:46 +00:00
Robert O'Callahan
72a21fe01d Introduce RmStats struct to encapsulate removal statistics 
Turns out this is not strictly necessary for this PR but it's
still a good thing to do and makes it clearer that the stats
are not modified in a possibly racy way.
 2026-03-06 02:05:43 +00:00
Robert O'Callahan
c2bb7d6a82 Make keep_cache_t process all modules up-front instead of on-demand 
We will want to query `keep_cache` from parallel threads. If we compute
the results on-demand, that means we need synchronization for cache
access in those queries, which adds complexity and overhead. Instead, prefill
the cache with the status of all relevant modules. Note that this doesn't
actually do more work --- we always consult `keep_cache` for all cells of
all selected modules, so scanning all those cells and determining the kept
status of all dependency modules is always required.

Later in this PR we're going to parallelize `scan_module` itself, and that's also
much easier to do when no other parallel threads are running.
 2026-03-06 02:05:04 +00:00
Robert O'Callahan
b42bb05b63 Parallelize Design::check() 2026-03-06 02:03:21 +00:00
Robert O'Callahan
e2166c4684 Parallelize collect_garbage() 2026-03-06 02:03:21 +00:00
Robert O'Callahan
5ff7d344c9 Add FfInitVals::set_parallel() method 
We'll use this later in the PR.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
fe329a0e14 Add MonotonicFlag 
We'll use this later in the PR.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
e71da96314 Add ConcurrentWorkQueue 
We'll use this later in the PR.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
ab238c3145 Add ShardedHashSet 
We'll use this later in the PR.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
87521df534 Add ShardedVector 
We'll use this later in the PR.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
b079e5721c Add ParallelDispatchThreadPool 
We'll use this later in the PR.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
898a288a99 Add work_pool_size, IntRange, item_range_for_worker, and ThreadIndex 
We'll use these later in this PR.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
13d9fffdb9 Work around std::reverse miscompilation with empty range 
This causes problems when compiling with fuzzing instrumenation enabled.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
bd7f2d9ba4 Make log_error() work in a Multithreaded context. 
`log_error()` causes an exit so we don't have to try too hard here. The main
thing is to ensure that we normally are able to exit without causing a stack
overflow due to recursive asserts about not being in a `Multithreaded` context.
 2026-03-06 02:03:21 +00:00
Robert O'Callahan
7af5dbae35 Add IdString::unescape() method 
We've already talked about adding this as an alternative to `log_id()`, and we'll
need it later in this PR.
 2026-03-06 02:03:21 +00:00
abhinavputhran
6cd66aed47 setundef: rename process loop variable and respect selection in -init mode 2026-03-05 17:51:01 -05:00
abhinavputhran
df283fa1c9 setundef: use selected_processes() per review feedback 2026-03-05 11:22:00 -05:00
abhinavputhran
4e54853e35 setundef: use selected_processes() per review feedback 2026-03-05 11:16:07 -05:00
Justin Zaun
d9737acc31 gowin: remove lib_whitebox from latch sim cells 
Latches are sequential elements and don't need lib_whitebox.
 2026-03-05 16:04:23 +01:00
Justin Zaun
9288889e20 gowin: add hardware latch support (DL/DLN/DLC/DLP variants) 
Add simulation models, techmap, and dfflegalize rules for Gowin
DL-series latch primitives. Latches use the same physical BEL as
DFFs with REGMODE set to LATCH. All 12 variants are supported:
DL, DLE, DLN, DLNE, DLC, DLCE, DLNC, DLNCE, DLP, DLPE, DLNP, DLNPE.
 2026-03-05 16:04:23 +01:00
Miodrag Milanović
95d738edc0
Merge pull request #5726 from YosysHQ/emil/double-expose-yosys_celltypes 
celltypes: include newcelltypes to allow legacy code access to migrat…
 2026-03-05 11:36:36 +00:00
Emil J
629bf3dffd
Merge pull request #5630 from apullin/array-assignment 
ast: Add support for array-to-array assignment
 2026-03-05 11:10:12 +00:00
Emil J. Tywoniak
23eb38fe3f celltypes: include newcelltypes to allow legacy code access to migrated yosys_celltypes 2026-03-05 11:59:20 +01:00
Lofty
da83c93673 analogdevices: fix SHIFTX name 2026-03-05 05:37:13 +00:00
Lofty
f3efa51b3e analogdevices: fix SHREG name 2026-03-05 05:37:13 +00:00
Lofty
e2e8245be9 analogdevices: fix MUXF78 name 2026-03-05 05:37:13 +00:00
Lofty
c747466a7a analogdevices: update missed T40LP timings 2026-03-05 05:37:13 +00:00
Lofty
91740645a9 analogdevices: update T40LP timings 2026-03-05 05:37:13 +00:00