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Code Activity
15980 commits 122 branches 59 tags 73 MiB
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1571 commits

Author SHA1 Message Date
Emil J. Tywoniak
dead2aa03f sdc: add -keep_hierarchy test 2025-10-08 13:43:37 +02:00
Miodrag Milanovic
1d2d777678 Next dev cycle 2025-10-08 09:25:33 +02:00
Miodrag Milanovic
157aabb583 Release version 0.58 2025-10-08 07:51:14 +02:00
github-actions[bot]
47ca09a016 Bump version 2025-10-08 00:22:29 +00:00
github-actions[bot]
b8b0f80f79 Bump version 2025-10-07 00:23:02 +00:00
github-actions[bot]
637665c9d3 Bump version 2025-10-04 00:21:39 +00:00
github-actions[bot]
f7120e9c2a Bump version 2025-10-02 00:22:09 +00:00
github-actions[bot]
01eaaa4b90 Bump version 2025-10-01 00:26:18 +00:00
Miodrag Milanovic
e6fa0223c8 Force linking log_compat when extensions are linked 2025-09-30 08:44:31 +02:00
github-actions[bot]
5fd2aecd90 Bump version 2025-09-30 00:23:05 +00:00
github-actions[bot]
6a5d956747 Bump version 2025-09-26 00:22:24 +00:00
github-actions[bot]
3f29cd7f4e Bump version 2025-09-25 00:22:44 +00:00
github-actions[bot]
ef22c6ee73 Bump version 2025-09-24 00:22:58 +00:00
github-actions[bot]
93dca50b91 Bump version 2025-09-23 00:22:45 +00:00
Emil J
a78eb9e151
Merge pull request #5315 from YosysHQ/emil/write_rtlil-no-sort 
write_rtlil: don't sort
 2025-09-22 11:14:39 +02:00
github-actions[bot]
b9dc578411 Bump version 2025-09-21 00:25:14 +00:00
github-actions[bot]
6b3a7e2440 Bump version 2025-09-20 00:21:36 +00:00
github-actions[bot]
a686c5a73c Bump version 2025-09-18 00:22:24 +00:00
Jannis Harder
d88d6fce87 kernel: Rewrite bufNormalize 
This is a complete rewrite of the RTLIL-kernel-side bufnorm code. This
is done to support inout ports and undirected connections as well as to
allow removal of cells while in bufnorm mode.

This doesn't yet update the (experimental) `bufnorm` pass, so to
manually test the new kernel functionality, it is important to only use
`bufnorm -update` and `bufnorm -reset` which rely entirely on the kernel
functionality. Other modes of the `bufnorm` pass may still fail in the
presence of inout ports or undirected connections.
 2025-09-17 13:56:46 +02:00
github-actions[bot]
5e550ddc30 Bump version 2025-09-17 00:22:59 +00:00
Emil J. Tywoniak
4215f3c134 rtlil: add textual roundtrip test 2025-09-16 15:47:16 +02:00
github-actions[bot]
fe9eed0498 Bump version 2025-09-16 00:22:09 +00:00
Robert O'Callahan
27462da208 Run ABCs in parallel. 
Large circuits can run hundreds or thousands of ABCs in a single AbcPass.
For some circuits, some of those ABC runs can run for hundreds of seconds.
Running ABCs in parallel with each other and in parallel with main-thread
processing (reading and writing BLIF files, copying ABC BLIF output into
the design) can give large speedups.
 2025-09-15 17:18:42 +02:00
github-actions[bot]
fa02d71f65 Bump version 2025-09-13 00:20:53 +00:00
github-actions[bot]
727998f663 Bump version 2025-09-12 00:22:43 +00:00
github-actions[bot]
c2291c10a6 Bump version 2025-09-10 00:22:30 +00:00
Jannis Harder
75a97241fa Maintain logging ABI compatiblity with YosysHQ Verific Extensions 
The YosysHQ Verific Extensions are compiled separately using their own
stripped-down version of the Yosys headers. To maintain ABI
compatibility with older extension builds post C++-ification of Yosys's
logging APIs, which are backwards compatible on the API but not ABI
level, this commit adds ABI compatible versions of a subset of the old
logging API used by the extensions.
 2025-09-09 15:41:03 +02:00
github-actions[bot]
23e4c0e424 Bump version 2025-09-09 00:23:18 +00:00
github-actions[bot]
012ddc2f1e Bump version 2025-09-06 00:21:53 +00:00
github-actions[bot]
baa61a146f Bump version 2025-09-05 00:23:12 +00:00
Miodrag Milanovic
cec48c6abd Next dev cycle 2025-09-04 08:03:57 +02:00
Miodrag Milanovic
3aca86049e Release version 0.57 2025-09-04 08:00:38 +02:00
github-actions[bot]
cd7f924290 Bump version 2025-09-04 00:22:11 +00:00
github-actions[bot]
45829e4d08 Bump version 2025-09-03 00:21:58 +00:00
github-actions[bot]
d4c4b21066 Bump version 2025-08-29 00:23:40 +00:00
github-actions[bot]
83d953e957 Bump version 2025-08-26 00:23:36 +00:00
Miodrag Milanovic
9f0904d048 Makefile: fix hardcoded -install_name for libyosys.so 2025-08-25 07:46:34 +02:00
Miodrag Milanovic
c6b8f0eed7 Merge branch 'bugfix/remove-hardcoded-soname' of github.com:Jiahui17/yosys into Jiahui17-bugfix/remove-hardcoded-soname 2025-08-25 07:45:26 +02:00
github-actions[bot]
6fdcdd41de Bump version 2025-08-22 00:23:32 +00:00
github-actions[bot]
4926e846f6 Bump version 2025-08-21 00:22:37 +00:00
github-actions[bot]
bfc9a322e2 Bump version 2025-08-19 00:24:35 +00:00
github-actions[bot]
d73cd78001 Bump version 2025-08-18 00:27:23 +00:00
github-actions[bot]
d10fdc0ec5 Bump version 2025-08-16 00:24:02 +00:00
github-actions[bot]
bf625951d7 Bump version 2025-08-15 00:26:03 +00:00
github-actions[bot]
a265b23ac0 Bump version 2025-08-14 00:25:16 +00:00
github-actions[bot]
8634d83320 Bump version 2025-08-13 00:25:15 +00:00
Krystine Sherwin
f4016d96cc Makefile: Add flex lib/include for brew 2025-08-11 13:34:10 +02:00
github-actions[bot]
0d4585dd5f Bump version 2025-08-09 00:24:43 +00:00
github-actions[bot]
c9558b3d4f Bump version 2025-08-08 00:26:50 +00:00
Miodrag Milanovic
e6059d042d Next dev cycle 2025-08-07 09:20:45 +02:00