18323 commits

This branch

This branch

All branches

Author	SHA1	Message	Date
Akash Levy	b56104ada2	Merge pull request #157 from Silimate/pmux2shiftx	2026-04-25 09:40:04 -07:00
Stan Lee	fe4434b105	Merge branch 'main' of github.com:silimate/yosys into pmux2shiftx	2026-04-24 17:19:49 -07:00
Stan Lee	325d9b0c0e	edit naming	2026-04-24 17:14:42 -07:00
Akash Levy	65aad25a61	Smallfix for bison	2026-04-22 12:06:10 -07:00
Akash Levy	e6f84b3b5b	Ensure verilog flex/bison symbols are overridden properly	2026-04-22 10:43:52 -07:00
Akash Levy	099a3c881b	Merge pull request #150 from Silimate/reenable_vhdl ... Reenable VHDL	2026-04-22 04:10:29 -07:00
Akash Levy	bf40364bd0	No operator optimization, but it passes all tests	2026-04-22 03:12:26 -07:00
Akash Levy	e7b60200d2	Merge pull request #156 from Silimate/splitcells ... [ENG-1923] - Splitcells pass overlap bug	2026-04-21 03:31:59 -07:00
Stan Lee	90c2bbe1d4	factor offset	2026-04-20 17:26:30 -07:00
Stan Lee	5f538db621	fix	2026-04-20 17:17:37 -07:00
Stan Lee	f377bb04e4	pull main	2026-04-20 16:57:15 -07:00
Akash Levy	c05efa055b	Merge pull request #155 from Silimate/fork-scope ... [CUS-486] Strip $fork scope and N-dim register flattening	2026-04-20 16:43:16 -07:00
Akash Levy	47a5a626e3	Merge pull request #153 from Silimate/reg-rename ... [ENG-1918] Handle edge cases in register renaming	2026-04-20 16:40:16 -07:00
Stan Lee	553ea0a173	edit	2026-04-20 16:11:28 -07:00
Stan Lee	5f663796ad	oops	2026-04-20 15:22:18 -07:00
Stan Lee	38f97edb45	Merge branch 'main' of github.com:silimate/yosys into fork-scope	2026-04-20 15:21:20 -07:00
Stan Lee	1646f7712a	bugfix	2026-04-20 15:12:56 -07:00
Stan Lee	102cbb8c0a	splitcells reg split fix	2026-04-20 15:07:09 -07:00
Stan Lee	fb9a64086e	undo	2026-04-20 14:47:57 -07:00
Stan Lee	1bc33bc8c5	re-trigger	2026-04-20 14:47:43 -07:00
Stan Lee	29f8c13ab7	greptile	2026-04-20 13:57:36 -07:00
Stan Lee	63b61f04d0	further remove	2026-04-20 13:42:57 -07:00
Stan Lee	608ed37a6d	N-dimensional regs	2026-04-20 13:42:08 -07:00
Stan Lee	39b36fa5f5	update autoscoping to ahndle fork scopes	2026-04-20 12:40:59 -07:00
Akash Levy	78874dfccd	Merge pull request #152 from Silimate/sim ... [ENG-1911] Registers should be annotated every cycle in 'sim'	2026-04-20 12:11:49 -07:00
Stan Lee	a92a086a0d	remove VCD parse method for fork scopes, handle on frontend side	2026-04-20 12:02:35 -07:00
Stan Lee	8653fea875	fix	2026-04-20 09:45:07 -07:00
Stan Lee	9e05fb7606	comments	2026-04-20 09:40:40 -07:00
Akash Levy	8823608317	Merge pull request #154 from Silimate/opt_expr_cmp_const ... opt_expr for constant comparisons	2026-04-20 03:24:02 -07:00
Akash Levy	8485d57841	opt_expr for constant comparisons	2026-04-20 02:03:35 -07:00
Stan Lee	3b7613d858	guard for multiple drivers	2026-04-19 21:30:12 -07:00
Stan Lee	d4bfebd0da	offsets supported in reg_rename	2026-04-19 20:00:09 -07:00
Stan Lee	da1072d77d	add flag to toggle reg overwriting	2026-04-17 15:10:40 -07:00
Stan Lee	07ae46f1ea	comments and cleanup	2026-04-17 11:31:25 -07:00
Stan Lee	1298607d95	fix compilation err	2026-04-17 10:29:13 -07:00
Stan Lee	e7ffe7a7df	override register states	2026-04-17 10:27:45 -07:00
Akash Levy	a19dfc535c	Merge pull request #151 from Silimate/reg-rename ... [ENG-1913] Significant reg_rename speedup	2026-04-16 16:27:13 -07:00
Stan Lee	85fc4fdc0e	fix	2026-04-16 15:35:11 -07:00
Akash Levy	0ee2277d4f	Use PIC Verific libraries	2026-04-16 15:30:40 -07:00
Stan Lee	2667070cdd	huge optimization	2026-04-16 15:27:55 -07:00
Stan Lee	e3ccb51cea	cleanup	2026-04-16 12:52:26 -07:00
Akash Levy	ed88ccd2fd	Add start/end group to fix linker issues	2026-04-16 11:51:11 -07:00
Akash Levy	ae7caf4bf3	Add back -no-pie	2026-04-16 11:37:20 -07:00
Akash Levy	f1f38cd765	Use multiple definition approach on Linux instead	2026-04-16 11:20:26 -07:00
Akash Levy	29024f215a	Exclude weak symbols from overridden symbols	2026-04-16 11:05:14 -07:00
Akash Levy	0dc6bf07f3	Weaken symbols	2026-04-16 10:47:05 -07:00
Akash Levy	4b0d2bdd8d	Update Verific for Linux build	2026-04-16 10:39:54 -07:00
Akash Levy	083eb8e5f1	Try again	2026-04-16 04:16:55 -07:00
Akash Levy	0db45a6796	Reenable VHDL	2026-04-16 04:03:31 -07:00
Akash Levy	7d7cf2bdf9	Merge pull request #149 from Silimate/reg-rename ... Reg-rename fix	2026-04-16 01:43:56 -07:00