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Author SHA1 Message Date
Martin Povišer
b5110fc69c
Merge 6b5fbe37f0 into 012ddc2f1e 2025-09-08 10:10:29 +12:00
github-actions[bot]
012ddc2f1e Bump version 2025-09-06 00:21:53 +00:00
Emil J
db7aa538f9
Merge pull request #5330 from higuoxing/fix-sva-in-case-expr 
Fix handling of cases that look like sva labels again.
 2025-09-05 20:10:56 +02:00
Emil J. Tywoniak
62120bda06 verilog: test cases that look like SVA labels #862 2025-09-05 12:34:38 +02:00
Emil J
71a88996d1
Merge pull request #5329 from mikesinouye/muxtree 
Increase muxtree glob eval attempts to 10M.
 2025-09-05 12:22:39 +02:00
Xing Guo
c30fd46ea3 Fix handling of cases that look like sva labels again. 
Commit c8e0ac0 introduces a regression on handling case exprs that look
like sva labels.  After some debugging, we shouldn't push the identifier
ast node to the ast_stack, otherwise, we will get the following
assertion failure:

```
➜  /tmp yosys -p 'read -sv a1.v'

 /----------------------------------------------------------------------------\
 |  yosys -- Yosys Open SYnthesis Suite                                       |
 |  Copyright (C) 2012 - 2025  Claire Xenia Wolf <claire@yosyshq.com>         |
 |  Distributed under an ISC-like license, type "license" to see terms        |
 \----------------------------------------------------------------------------/
 Yosys 0.57+1 (git sha1 baa61a146, clang++ 20.1.8 -fPIC -O3)

-- Running command `read -sv a1.v' --

1. Executing Verilog-2005 frontend: a1.v
Parsing SystemVerilog input from `a1.v' to AST representation.
ERROR: Assert `extra->ast_stack.size() == 1' failed in frontends/verilog/verilog_parser.y:709.
➜  /tmp cat a1.v
module test(input wire A);
  localparam TEST = 1;
  always_comb begin
    case (A)
      TEST: assert(1);
    endcase
  end
endmodule
```

We encountered this issue before but with a different error message[^1],

[^1]: https://github.com/YosysHQ/yosys/issues/862
 2025-09-05 11:54:13 +08:00
github-actions[bot]
baa61a146f Bump version 2025-09-05 00:23:12 +00:00
Mike Inouye
6276464ea7
Increase muxtree glob eval attempts to 10M. 2025-09-04 10:52:37 -07:00
Miodrag Milanovic
cec48c6abd Next dev cycle 2025-09-04 08:03:57 +02:00
Miodrag Milanovic
3aca86049e Release version 0.57 2025-09-04 08:00:38 +02:00
github-actions[bot]
cd7f924290 Bump version 2025-09-04 00:22:11 +00:00
Miodrag Milanović
1e43e85f39
Merge pull request #5325 from YosysHQ/update_abc_092025 
Update ABC to version as of 03/09/2025
 2025-09-03 20:07:59 +02:00
Miodrag Milanovic
7454699a00 Update ABC to version as of 03/09/2025 2025-09-03 18:12:21 +02:00
Miodrag Milanović
6fa1435dc7
Merge pull request #5322 from YosysHQ/krys/macos_cpp20 
CI Fixes
 2025-09-03 18:10:38 +02:00
github-actions[bot]
45829e4d08 Bump version 2025-09-03 00:21:58 +00:00
Krystine Sherwin
5d59903f36
Bump Windows SDK 2025-09-03 09:32:21 +12:00
Krystine Sherwin
d70f132792
wrapcell.cc: Avoid format name collision 2025-09-03 03:32:01 +12:00
Krystine Sherwin
7fb6c1ee52
test-compile.yml: Specify clang-19 
Will trigger C++20 builds to run (which are currently failing).
 2025-09-03 03:32:00 +12:00
KrystalDelusion
819b9635b4
Merge pull request #5319 from YosysHQ/krys/brew_bundle 
Fix failing macOS CI runs
 2025-09-02 18:03:00 +12:00
Krystine Sherwin
11f5913da6
Brewfile: Skip tcl-tk 2025-09-02 15:25:39 +12:00
Krystine Sherwin
5db312b6cf
Bump to llvm@20 2025-09-02 11:30:57 +12:00
Krystine Sherwin
2261c7e366
test-compile.yml: Compiler tests for arm mac 2025-09-02 11:25:31 +12:00
Krystine Sherwin
3426905e60
CI: Use brew bundle 
Also skip `brew update`.
Specify llvm@20 due to problems with clang-21 and macOS .dylib.
 2025-09-02 10:36:55 +12:00
Jannis Harder
41452e43b2
Merge pull request #4475 from georgerennie/skip_cover 
smtbmc: Support skipping steps in cover mode
 2025-09-01 13:53:04 +02:00
Jannis Harder
501bf4ce40
Merge pull request #4711 from georgerennie/george/btor_buf 
write_btor: support $buf
 2025-09-01 13:38:25 +02:00
Emil J
5aa71505fc
Merge pull request #5287 from Anhijkt/opt_dff-fix-5279 
opt_dff: fix timeout issue
 2025-09-01 11:20:35 +02:00
github-actions[bot]
d4c4b21066 Bump version 2025-08-29 00:23:40 +00:00
Miodrag Milanovic
88eb83a0c3 Revert "Merge pull request #5301 from KrystalDelusion/krys/re_5280" 
This reverts commit c9a602e882, reversing
changes made to 51eaaffe09.
 2025-08-28 11:58:02 +02:00
Miodrag Milanović
c9a602e882
Merge pull request #5301 from KrystalDelusion/krys/re_5280 
Reapply "Workflow adjustments"
 2025-08-28 10:51:49 +02:00
Emil J. Tywoniak
8333a83cef opt_dff: more explicit testing, typo 2025-08-27 11:29:57 +02:00
N. Engelhardt
51eaaffe09
Merge pull request #4735 from YosysHQ/ql_noflatten_option 2025-08-26 14:27:58 +02:00
github-actions[bot]
83d953e957 Bump version 2025-08-26 00:23:36 +00:00
N. Engelhardt
15d24bf2e6 synth_quicklogic: add -noflatten option 2025-08-25 17:25:58 +02:00
Emil J
c5d096b7b8
Merge pull request #5308 from YosysHQ/emil/opt_muxtree-refactor 
opt_muxtree: refactor
 2025-08-25 16:48:01 +02:00
Emil J. Tywoniak
b45e5854bf opt_muxtree: comment wording 2025-08-25 16:36:07 +02:00
Emil J
2163b3ebe4
Merge pull request #5313 from rocallahan/hash-ref 
hash_ops should take all parameters by reference instead of requiring copies of vectors, tuples etc
 2025-08-25 16:31:36 +02:00
Miodrag Milanović
c7e6275d0d
Merge pull request #5045 from danderson/push-nwpulrqymkqp 
techlibs/lattice: add missing clock muxes to ECP5 block ram blackboxes
 2025-08-25 15:28:34 +02:00
Emil J
a67a3ca49c
Merge pull request #4497 from YosysHQ/emil/bitpattern-comments 
bitpattern: comments
 2025-08-25 15:25:37 +02:00
Miodrag Milanovic
dd5cc66b95 Merge branch 'Jiahui17-bugfix/remove-hardcoded-soname' 2025-08-25 07:47:01 +02:00
Miodrag Milanovic
9f0904d048 Makefile: fix hardcoded -install_name for libyosys.so 2025-08-25 07:46:34 +02:00
Miodrag Milanovic
c6b8f0eed7 Merge branch 'bugfix/remove-hardcoded-soname' of github.com:Jiahui17/yosys into Jiahui17-bugfix/remove-hardcoded-soname 2025-08-25 07:45:26 +02:00
Robert O'Callahan
b5aa3ab9f7 hash_ops should take all parameters by reference instead of requiring copies of vectors, tuples etc 2025-08-25 03:09:04 +00:00
github-actions[bot]
6fdcdd41de Bump version 2025-08-22 00:23:32 +00:00
Emil J
65109822b4
Merge pull request #5305 from rocallahan/opt-merge-perf 
Use commutative hashing in `OptMergePass` instead of allocating containers and sorting them to get canonical hashes
 2025-08-21 17:58:55 +02:00
Emil J. Tywoniak
4dea774171 opt_muxtree: refactor 2025-08-21 12:52:22 +02:00
Ethan Mahintorabi
d10190606c verilog: Lower required bison version to 3.6 
We're currently on version 3.6 of bison at Google, and Yosys
still correctly builds with it. This should better reflect
the actual requirements rather than an overly restrictive
check. If features from 3.8 are required it seems like bumping
would be appropriate.

Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2025-08-21 08:26:33 +01:00
Ethan Mahintorabi
7f0130efce verilog: Fix missing sstream include 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2025-08-21 08:26:20 +01:00
github-actions[bot]
4926e846f6 Bump version 2025-08-21 00:22:37 +00:00
Robert O'Callahan
8c04e5266c Use commutative hashing instead of expensive allocation and sorting 
For one of our large circuits, this improves the `OptMergePass` runtime
from about 150s to about 130s. It's also simpler code.
 2025-08-20 19:35:22 +00:00
Robert O'Callahan
7d0ea0d64f Refactor call to sorted_pmux_in to avoid copying the connection dictionary 2025-08-20 19:35:22 +00:00