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Merge pull request #5330 from higuoxing/fix-sva-in-case-expr
Fix handling of cases that look like sva labels again.
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commit
db7aa538f9
2 changed files with 12 additions and 1 deletions
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@ -3023,7 +3023,8 @@ case_expr_list:
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SET_AST_NODE_LOC(node, @1, @1);
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} |
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TOK_SVA_LABEL {
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AstNode* node = extra->pushChild(std::make_unique<AstNode>(@$, AST_IDENTIFIER));
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AstNode* node = extra->saveChild(std::make_unique<AstNode>(@$, AST_IDENTIFIER));
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node->str = *$1;
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SET_AST_NODE_LOC(node, @1, @1);
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} |
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expr {
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10
tests/verilog/sva-in-case-expr.ys
Normal file
10
tests/verilog/sva-in-case-expr.ys
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@ -0,0 +1,10 @@
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read_verilog -sv <<EOT
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module test(input wire A);
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localparam TEST = 1;
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always_comb begin
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case (A)
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TEST: assert(1);
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endcase
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end
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endmodule
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EOT
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