16755 commits

This branch

This branch

All branches

Author	SHA1	Message	Date
abhinavputhran	9e666c727f	setundef: respect selection in -undriven mode	2026-03-06 10:37:59 -05:00
abhinavputhran	6cd66aed47	setundef: rename process loop variable and respect selection in -init mode	2026-03-05 17:51:01 -05:00
abhinavputhran	df283fa1c9	setundef: use selected_processes() per review feedback	2026-03-05 11:22:00 -05:00
abhinavputhran	4e54853e35	setundef: use selected_processes() per review feedback	2026-03-05 11:16:07 -05:00
abhinavputhran	94c789e9c8	setundef: respect selection for cells, processes, and connections ... Previously, setundef would rewrite sigspecs in all cells, processes, and connections regardless of the active selection. Only modules and memories were correctly filtered by selection. Fix by using module->selected_cells() for cells, adding a module->selected() check for processes, and checking wire selection on the lhs of each connection before rewriting. Fixes #5624	2026-03-04 17:48:35 -05:00
Emil J	0d7a875675	Merge pull request #5512 from YosysHQ/emil/turbo-celltypes ... celltypes: compile-time lookup tables for internal cells	2026-03-04 14:47:57 +00:00
Emil J. Tywoniak	6485a13809	newcelltypes: mark header unstable	2026-03-04 15:17:26 +01:00
Miodrag Milanović	3bc26ff4d0	Merge pull request #5723 from YosysHQ/micko/merge_queue ... CI: add support for merge queue	2026-03-04 13:18:09 +01:00
nella	16b1a914f1	Aiger use defines for known ops.	2026-03-04 12:39:45 +01:00
nella	04822c6660	Readd builtin_ff_cell_types for plugin parity.	2026-03-04 12:39:45 +01:00
nella	b8ee0803ab	Remove todo.	2026-03-04 12:39:45 +01:00
nella	66bd4716cf	rtlil use newcelltypes.	2026-03-04 12:39:45 +01:00
nella	cae54a4c7b	Aiger use newcelltypes.	2026-03-04 12:39:45 +01:00
Emil J. Tywoniak	6d4736269b	newcelltypes: extend testing	2026-03-04 12:39:45 +01:00
Emil J. Tywoniak	0284595e9c	celltypes: fix absurd eval declarations	2026-03-04 12:39:45 +01:00
Emil J. Tywoniak	793a3513c6	newcelltypes: use unordered_map	2026-03-04 12:39:45 +01:00
Emil J. Tywoniak	ae10e9e955	pyosys: disable test	2026-03-04 12:39:45 +01:00
Emil J. Tywoniak	661fcb24cb	newcelltypes: fix MSVC build	2026-03-04 12:39:45 +01:00
Emil J. Tywoniak	f594014bef	newcelltypes: proper bounds for unit test	2026-03-04 12:39:45 +01:00
Emil J. Tywoniak	12412d1fa5	register: use newcelltypes	2026-03-04 12:39:45 +01:00
Emil J. Tywoniak	ecb8b20f62	yosys: use newcelltypes for yosys_celltypes users	2026-03-04 12:39:44 +01:00
Emil J. Tywoniak	5216d32d1b	yosys: use newcelltypes for yosys_celltypes	2026-03-04 12:22:47 +01:00
Emil J. Tywoniak	7a5c303ccd	backends: use newcelltypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	c3ed884bc4	drivertools: use newcelltypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	665b6eeb4a	aiger2: add TODO	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	4ab22cbb97	abc: use newcelltypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	d91e1c8607	newcelltypes: test against builtin_ff_cell_types	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	31b86ebc2e	newcelltypes: comment	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	8e17fb0266	consteval: use newcelltypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	a0f87dc2d1	modtools: use newcelltypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	a9463d1aee	newcelltypes: fix non-cells	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	e3f9911e33	newcelltypes: refactor	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	07ec8708e4	share: use newcelltypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	3212dfaf1f	newcelltypes: fix unit test	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	2d7d6ca10b	newcelltypes: unit test	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	7e9e88c2ec	newcelltypes: bounds check	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	9e59f05c25	newcelltypes: wrap design celltypes support	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	35ccaa60d7	newcelltypes: TurboCellTypes -> StaticCellTypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	6adc08b0e5	opt_expr: use newcelltypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	3671d577a0	opt_clean: use newcelltypes	2026-03-04 12:22:14 +01:00
Emil J. Tywoniak	a61455645d	newcelltypes: init	2026-03-04 12:22:14 +01:00
Miodrag Milanovic	cf4d4ff23d	CI: add support for merge queue	2026-03-04 11:35:16 +01:00
Miodrag Milanović	05d1d56b9d	Merge pull request #5704 from apullin/apullin/abc9-no-loops-fix ... abc9: preserve topological-loop asserts with targeted SCC fallback	2026-03-04 11:09:38 +01:00
Miodrag Milanović	d3e297fcd4	Merge pull request #5722 from YosysHQ/release/v0.63 ... Yosys Release v0.63	2026-03-04 09:31:22 +01:00
Miodrag Milanovic	228052bfb3	Next dev cycle	2026-03-04 08:45:13 +01:00
Miodrag Milanovic	70a11c6bf0	Release version 0.63	2026-03-04 07:46:57 +01:00
Miodrag Milanovic	b7d013e6bf	Fix help message for equiv passes	2026-03-04 07:46:40 +01:00
Emil J	04113eb95d	Merge pull request #5714 from likeamahoney/auto-proc-vars ... support automatic lifetime qualifier on procedural variables	2026-03-03 17:31:37 +01:00
KrystalDelusion	1d3f9b7905	Merge pull request #5687 from YosysHQ/nella/pdr-doc ... Update help text for rename -witness and write_aiger -ywmap	2026-03-02 09:29:25 +13:00
likeamahoney	e9442194f2	support automatic lifetime qualifier on procedural variables	2026-02-27 20:42:52 +03:00