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Author	SHA1	Message	Date
Clifford Wolf	a67d63714b	Fix handling of z_digit "?" and fix optimization of cmp with "z" ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-09-13 13:39:39 +02:00
Clifford Wolf	4da6e19fe1	Merge pull request #1373 from YosysHQ/clifford/fix1364 ... Fix lexing of integer literals	2019-09-13 10:22:34 +02:00
Clifford Wolf	855e6a9b91	Fix lexing of integer literals without radix ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-09-13 10:19:58 +02:00
Eddie Hung	734034a872	Add an ASCII drawing	2019-09-12 18:13:46 -07:00
Eddie Hung	c52863f147	Finish explanation	2019-09-12 18:01:49 -07:00
Eddie Hung	aaeaab4ac0	Rename to techmap_guard	2019-09-12 17:45:02 -07:00
Eddie Hung	6bb8e6a726	Initial DSP48E1 box support	2019-09-12 17:11:01 -07:00
Eddie Hung	3a39073302	Set more ports explicitly	2019-09-12 17:10:43 -07:00
Eddie Hung	a1123b095c	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-09-12 12:11:11 -07:00
Eddie Hung	c487a8ff25	Grammar	2019-09-12 12:00:34 -07:00
Eddie Hung	c05a403dd1	static_assert to enforce this going forward	2019-09-12 11:45:17 -07:00
Eddie Hung	4ea34aaacd	SigSet<Cell*> to use stable compare class	2019-09-12 11:45:02 -07:00
David Shah	6044fff074	Merge pull request #1370 from YosysHQ/dave/equiv_opt_multiclock ... Add equiv_opt -multiclock	2019-09-12 12:26:28 +01:00
Clifford Wolf	7eb593829f	Fix lexing of integer literals, fixes #1364 ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-09-12 09:43:32 +02:00
Eddie Hung	f3081c20e7	Add support for A1 and B1 registers	2019-09-11 17:16:46 -07:00
Eddie Hung	4369fc17d0	Raise a RuntimeError instead of AssertionError	2019-09-11 17:06:37 -07:00
Eddie Hung	7d644f40ed	Add AREG=2 BREG=2 test	2019-09-11 17:05:47 -07:00
Eddie Hung	6fa6bf483c	Rename {A,B} -> {A2,B2}	2019-09-11 16:21:24 -07:00
Eddie Hung	3a49aa6b4a	Tidy up	2019-09-11 14:20:49 -07:00
Eddie Hung	817ac7c5e0	Fix UB	2019-09-11 14:18:02 -07:00
Eddie Hung	63431fe42a	Fix UB	2019-09-11 14:17:45 -07:00
Eddie Hung	690b1a064d	Add PCOUT -> PCIN non-shifted cascading	2019-09-11 13:48:45 -07:00
Eddie Hung	c0f26c2da8	Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp	2019-09-11 13:37:11 -07:00
Eddie Hung	bdb5e0f29c	Cope with presence of reset muxes too	2019-09-11 13:36:37 -07:00
Eddie Hung	4937917cd8	Cleanup	2019-09-11 13:22:52 -07:00
Eddie Hung	f46ef47893	Add more tests	2019-09-11 13:22:41 -07:00
Eddie Hung	0ebbecf833	Missing space	2019-09-11 13:06:59 -07:00
Eddie Hung	e9eb855d38	Make unextend a udata	2019-09-11 13:06:49 -07:00
Eddie Hung	bbef0d2ac8	Only display log message if did_something	2019-09-11 12:29:26 -07:00
Eddie Hung	d232e6a6cd	Input registers to add DSP as new siguser to block upstream packing	2019-09-11 11:46:21 -07:00
Eddie Hung	e5bdb521fa	More cleanup	2019-09-11 10:55:45 -07:00
Marcin Kościelnicki	f72765090c	Add -match-init option to dff2dffs.	2019-09-11 19:38:20 +02:00
Eddie Hung	0d709d2bb5	Add support for A/B/C/D/AD reset	2019-09-11 10:15:19 -07:00
Eddie Hung	6a95ecd41d	Update test with a/b reset	2019-09-11 10:13:13 -07:00
Eddie Hung	36d6db7f8a	Extend test for RSTP and RSTM	2019-09-11 09:09:08 -07:00
Eddie Hung	ded805ae5d	Add support for RSTM	2019-09-11 07:34:14 -07:00
David Shah	c43e52d2d7	Add equiv_opt -multiclock ... Signed-off-by: David Shah <dave@ds0.me>	2019-09-11 13:55:59 +01:00
David Shah	c7f1368cd2	Merge pull request #1362 from xobs/smtbmc-msvc2-build-fixes ... MSVC2 fixes	2019-09-11 09:57:30 +01:00
Eddie Hung	fc7008671f	Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp	2019-09-11 00:57:25 -07:00
Eddie Hung	edf90afd20	Rename dffmuxext -> dffmux, also remove constants in dff+mux	2019-09-11 00:56:38 -07:00
Eddie Hung	3a8582081e	proc instead of prep	2019-09-11 00:14:06 -07:00
Eddie Hung	6b23c7c227	Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp	2019-09-11 00:07:33 -07:00
Eddie Hung	580faae8ad	Add unsigned case	2019-09-11 00:07:17 -07:00
Eddie Hung	feb3fa65a3	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-09-11 00:01:31 -07:00
Eddie Hung	b08797da6b	Only pack out registers if \init is zero or x; then remove \init from PREG	2019-09-10 21:33:14 -07:00
Eddie Hung	37a34eeb04	Fix RSTP	2019-09-10 20:56:13 -07:00
Eddie Hung	af147d1430	Add support for RSTP	2019-09-10 20:51:48 -07:00
Eddie Hung	c6df55a9e7	enpol -> cepol	2019-09-10 18:59:03 -07:00
Eddie Hung	86700c2bea	d?ffmux -> d?ffcemux	2019-09-10 18:52:54 -07:00
Eddie Hung	8b8a68b38a	Refactor MREG and PREG to out_dffe subpattern	2019-09-10 18:27:05 -07:00