This commit adds support for real-valued parameters in blackboxes. Additionally,
parameters now retain their types are no longer all encoded as strings.
There is a caveat with this implementation due to my limited knowledge of yosys,
more specifically to how yosys encodes bitwidths of parameter values. The example
below can motivate the implementation choice I took. Suppose a verilog component
is declared with the following parameters:
parameter signed [26:0] test_signed;
parameter [26:0] test_unsigned;
parameter signed [40:0] test_signed_large;
If you instantiate it as follows:
defparam <inst_name> .test_signed = 49;
defparam <inst_name> .test_unsigned = 40'd35;
defparam <inst_name> .test_signed_large = 40'd12;
If you peek in the RTLIL::Const structure corresponding to these params, you
realize that parameter "test_signed" is being considered as a 32-bit value
since it's declared as "49" without a width specifier, even though the parameter
is defined to have a maximum width of 27 bits.
A similar issue occurs for parameter "test_unsigned" where it is supposed to take
a maximum bit width of 27 bits, but if the user supplies a 40-bit value as above,
then yosys considers the value to be 40 bits.
I suppose this is due to the type being defined by the RHS rather than the definition.
Regardless of this, I emit the same widths as what the user specifies on the RHS when
generating firrtl IR.
- expand_genblock defers prefixing of items within named sub-blocks
- Allow partially-qualified references to local scopes
- Handle shadowing within generate blocks
- Resolve generate scope references within tasks and functions
- Apply generate scoping to genvars
- Resolves#2214, resolves#1456
The main part is converting ice40_dsp to recognize the new FF types
created in opt_dff instead of trying to recognize the mux patterns on
its own.
The fsm call has been moved upwards because the passes cannot deal with
$dffe/$sdff*, and other optimizations don't help it much anyway.
The main part is converting xilinx_dsp to recognize the new FF types
created in opt_dff instead of trying to recognize the patterns on its
own.
The fsm call has been moved upwards because the passes cannot deal with
$dffe/$sdff*, and other optimizations don't help it much anyway.
Before this fix, equiv_induct only assumed that one of the following is
true:
- defined value of A is equal to defined value of B
- A is undefined
This lets through valuations where A is defined, B is undefined, and
the defined (meaningless) value of B happens to match the defined value
of A. Instead, tighten this up to OR of the following:
- defined value of A is equal to defined value of B, and B is not
undefined
- A is undefined
Previous blackbox components were just emitted with their interface ports,
but their generic parameters were never emitted and it was therefore
impossible to customize them.
This commit adds support for blackbox generic parameters, though support
is only provided for INTEGER and STRING parameters. Other types of
parameters such as DOUBLEs, ..., would result in undefined behavior here.
This allows the emission of custom extmodule instances such as the following:
extmodule fourteennm_lcell_comb_<instName>:
input cin: UInt<1>
output combout: UInt<1>
output cout: UInt<1>
input dataa: UInt<1>
input datab: UInt<1>
input datac: UInt<1>
input datad: UInt<1>
input datae: UInt<1>
input dataf: UInt<1>
input datag: UInt<1>
input datah: UInt<1>
input sharein: UInt<1>
output shareout: UInt<1>
output sumout: UInt<1>
defname = fourteennm_lcell_comb
parameter extended_lut = "off"
parameter lut_mask = "b0001001000010010000100100001001000010010000100100001001000010010"
parameter shared_arith = "off"