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Author	SHA1	Message	Date
Akash Levy	89f9035a98	Fix VHDL checking	2024-09-22 06:45:47 -07:00
Akash Levy	7d5dac7255	More apt location for whereami	2024-09-22 06:02:20 -07:00
Akash Levy	f1ab51ce5b	Clean up and remove hdl_file_sort	2024-09-22 05:58:17 -07:00
Akash Levy	facb9e8abe	Disable plugins and slang for now	2024-09-22 05:24:23 -07:00
Akash Levy	f0b1d2cac5	Small changes	2024-09-22 01:11:26 -07:00
Akash Levy	3b8c607dfd	Update yosys-slang	2024-09-21 22:18:50 -07:00
Akash Levy	7f38ea8721	Update yosys-slang	2024-09-19 16:43:01 -07:00
Akash Levy	494eba8d66	Update yosys-slang	2024-09-19 16:36:30 -07:00
Akash Levy	4cf9bb86ca	Smallfix	2024-09-19 01:04:29 -07:00
Akash Levy	7988a61f8c	Use enable debug and switch order of Verific opt passes	2024-09-19 00:48:31 -07:00
Akash Levy	03f740e2a4	Undo annoying commit bdc43c6592	2024-09-18 22:05:23 -07:00
Akash Levy	db0317afc5	Add support for int stuff	2024-09-18 16:46:53 -07:00
Akash Levy	1801bb966a	Smallfix for slang support	2024-09-18 16:19:38 -07:00
Akash Levy	c71203d5f9	Fix slang install dir	2024-09-18 16:15:51 -07:00
Akash Levy	2d139c8735	Smallfix to remove top/bottom-bound attributes	2024-09-18 14:46:13 -07:00
Akash Levy	a7b71684cc	Updates	2024-09-17 22:43:23 -07:00
Akash Levy	9bb6daa43a	Merge branch 'YosysHQ:main' into main	2024-09-17 22:42:22 -07:00
github-actions[bot]	4d581a97d6	Bump version	2024-09-18 00:19:41 +00:00
Akash Levy	9f44ec8aa1	Merge branch 'YosysHQ:main' into main	2024-09-17 15:24:05 -07:00
Martin Povišer	a553b7c0c7	Merge pull request #3967 from YosysHQ/claire/bufnorm ... Add "buffered-normalized mode", add $buf cell type, and add "bufnorm" command	2024-09-17 11:27:23 +02:00
Martin Povišer	eeffca9470	simlib: Add $buf disclaimer	2024-09-17 10:46:20 +02:00
Martin Povišer	e13ace675e	dump: Update help after option removal	2024-09-17 10:46:20 +02:00
Martin Povišer	38de01807e	Mark bufnorm experimental	2024-09-17 10:46:20 +02:00
Martin Povišer	865df26fac	Adjust buf-normalized mode	2024-09-17 10:46:20 +02:00
Claire Xenia Wolf	80119386c0	Add RTLIL "buffered-normalized mode" and improve "bufnorm" pass ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2024-09-17 10:46:20 +02:00
Claire Xenia Wolf	8bb70bac8d	Improvements in "bufnorm" pass ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2024-09-17 10:46:20 +02:00
Claire Xenia Wolf	d027ead4b5	Improvements in "bufnorm" pass ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2024-09-17 10:46:20 +02:00
Claire Xenia Wolf	4d469f461b	Add coarse-grain $buf buffer cell type ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2024-09-17 10:46:20 +02:00
Claire Xenia Wolf	f4b7ea5fb3	Improvements in "bufnorm" pass ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2024-09-17 10:46:20 +02:00
Claire Xenia Wolf	32808a0393	Improvements and fixes to "bufnorm" cmd ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2024-09-17 10:46:20 +02:00
Claire Xenia Wolf	d0b5dfa6ef	Add bufnorm pass ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2024-09-17 10:46:20 +02:00
Akash Levy	e4f1f5a96c	Merge branch 'YosysHQ:main' into main	2024-09-16 19:14:49 -07:00
Akash Levy	44789c9f6c	Move ram opt around	2024-09-16 18:56:48 -07:00
github-actions[bot]	c8846243c2	Bump version	2024-09-17 00:16:41 +00:00
Akash Levy	76b072151d	Bump yosys-slang	2024-09-16 07:12:31 -07:00
Akash Levy	e4edea1b25	Update	2024-09-16 07:03:38 -07:00
Akash Levy	210ec6585f	Merge branch 'YosysHQ:main' into main	2024-09-16 06:59:25 -07:00
Emil J	f8ad371254	Merge pull request #4594 from yrabbit/cpu-wip ... Gowin. Add the EMCU primitive.	2024-09-16 15:41:14 +02:00
Emil J	52382c6544	Merge pull request #4583 from YosysHQ/emil/clock_gate ... clockgate: centralize clock enables out of FFs	2024-09-16 15:41:01 +02:00
Emil J. Tywoniak	f193bcf683	clockgate: help string	2024-09-16 14:20:33 +02:00
Emil J. Tywoniak	be7c93ec6d	clockgate: 1-bit const 0	2024-09-16 13:58:27 +02:00
Emil J	a8a92d3469	clockgate: help string ... Co-authored-by: Martin Povišer <povik@cutebit.org>	2024-09-16 13:55:53 +02:00
Akash Levy	1eb887238e	Bump yosys-slang dep	2024-09-12 12:23:59 -07:00
Akash Levy	285c8a3f66	Merge branch 'YosysHQ:main' into main	2024-09-12 11:14:15 -07:00
N. Engelhardt	c8b42b7d48	Merge pull request #4538 from RCoeurjoly/verific_bounds	2024-09-12 13:04:04 +02:00
github-actions[bot]	229d1ea937	Bump version	2024-09-12 00:19:38 +00:00
Akash Levy	985de62d3c	Merge branch 'YosysHQ:main' into main	2024-09-11 16:01:37 -07:00
Emil J. Tywoniak	1e999a3cb7	clockgate: EN can be a bit on a multi-bit wire	2024-09-11 19:18:25 +02:00
Akash Levy	a96337110f	Bump version	2024-09-11 04:16:34 -07:00
Martin Povišer	34572708d5	Merge pull request #4595 from YosysHQ/emil/internal_stats-astnode ... internal_stats: astnode (sizeof)	2024-09-11 12:21:29 +02:00