356 commits

Author	SHA1	Message	Date
Eddie Hung	27e5bf5aad	Stop trying to be too smart by prematurely optimising	2019-09-26 09:57:11 -07:00
Eddie Hung	63940913d2	Only wreduce on t:$add	2019-09-25 17:22:04 -07:00
Eddie Hung	289cf688b7	Re-add DSP_A_MINWIDTH, remove unnec. opt_expr -fine from synth_ice40	2019-09-20 09:02:29 -07:00
Eddie Hung	829e4f5d2c	Revert "Move mul2dsp before wreduce" ... This reverts commit e4f4f6a9d5.	2019-09-20 08:56:16 -07:00
Eddie Hung	e4f4f6a9d5	Move mul2dsp before wreduce	2019-09-20 08:41:40 -07:00
Eddie Hung	3b9b0fcd06	Tidy up synth_ice40, only restrict DSP_B_MINWIDTH=2	2019-09-19 14:57:38 -07:00
Eddie Hung	e742478e1d	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-09-05 13:01:27 -07:00
Eddie Hung	f0fef90e9d	Merge remote-tracking branch 'origin/master' into xaig_arrival	2019-08-30 10:30:46 -07:00
David Shah	6919c0f9b0	Merge branch 'master' into xc7dsp	2019-08-30 13:57:15 +01:00
Eddie Hung	25b1670a84	Rename boxes too	2019-08-29 07:03:32 -07:00
Eddie Hung	e8e3830868	Comment out SB_MAC16 arrival time for now, need to handle all its modes	2019-08-28 19:09:29 -07:00
Eddie Hung	309684af16	Add arrival for SB_MAC16.O	2019-08-28 19:07:28 -07:00
Eddie Hung	efa4ee5c0e	Add arrival times for U	2019-08-28 19:03:29 -07:00
Eddie Hung	4bda902f1b	LX -> LP	2019-08-28 19:02:54 -07:00
Eddie Hung	0f4e9f6bc5	Round not floor	2019-08-28 18:57:34 -07:00
Eddie Hung	927f1e3754	Add LP timings	2019-08-28 18:56:25 -07:00
Eddie Hung	e3709e5ee6	LX -> LP	2019-08-28 18:51:14 -07:00
Eddie Hung	a4f641f230	Do not overwrite LUT param	2019-08-28 18:46:53 -07:00
Eddie Hung	c0b99ed0e8	Do not overwrite LUT param	2019-08-28 18:45:09 -07:00
Eddie Hung	070f3ac561	Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival	2019-08-28 17:29:25 -07:00
Eddie Hung	d46d38e4d5	Trailing comma	2019-08-28 17:25:54 -07:00
Eddie Hung	f5b4bc847c	Adapt to $__ICE40_CARRY_WRAPPER	2019-08-28 17:25:05 -07:00
Eddie Hung	e569f13870	Revert "Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with" ... This reverts commit 2aedee1f0e.	2019-08-28 17:22:44 -07:00
Eddie Hung	2421cb3fed	Add arrival times for HX devices	2019-08-28 17:21:37 -07:00
Eddie Hung	e4f89e01b5	Specify ice40 family to cells_sim.v using define	2019-08-28 17:21:12 -07:00
Eddie Hung	2aedee1f0e	Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with ... CARRY_WRAPPER in the same way since I0 and I3 could be used	2019-08-28 17:07:36 -07:00
Eddie Hung	077e9d4ada	Update box size and timings	2019-08-28 17:07:24 -07:00
Eddie Hung	129df7184a	Update to new $__ICE40_CARRY_WRAPPER	2019-08-28 17:07:07 -07:00
Eddie Hung	a270af00cc	Put abc_* attributes above port	2019-08-23 11:21:44 -07:00
Eddie Hung	14c03861b6	Merge pull request #1304 from YosysHQ/eddie/abc9_refactor ... Refactor abc9 to use port attributes, not module attributes	2019-08-20 11:59:31 -07:00
Eddie Hung	d81a090d89	Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithro	2019-08-19 09:56:17 -07:00
Eddie Hung	1c57b1e7ea	Update abc_* attr in ecp5 and ice40	2019-08-16 15:56:57 -07:00
Eddie Hung	8a2480526f	Fix $lut pin ordering inside $__ICE40_CARRY_WRAPPER	2019-08-12 12:19:25 -07:00
Eddie Hung	12c692f6ed	Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder" ... This reverts commit c851dc1310, reversing changes made to f54bf1631f.	2019-08-12 12:06:45 -07:00
Eddie Hung	f890cfb63b	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-08-12 11:32:10 -07:00
David Shah	f9020ce2b3	Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"	2019-08-10 17:14:48 +01:00
Clifford Wolf	f54bf1631f	Merge pull request #1258 from YosysHQ/eddie/cleanup ... Cleanup a few barnacles across codebase	2019-08-10 09:52:14 +02:00
Eddie Hung	6d254f2de8	Add wreduce to synth_ice40 -dsp as well	2019-08-09 17:05:56 -07:00
Eddie Hung	2c0be7aa5d	Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing	2019-08-08 12:56:05 -07:00
Eddie Hung	9776084eda	Allow whitebox modules to be overwritten	2019-08-07 16:40:24 -07:00
Eddie Hung	675c1d4218	Add ice40_wrapcarry pass, rename $__ICE40_FULL_ADDER -> CARRY_WRAPPER	2019-08-07 16:29:38 -07:00
Eddie Hung	cc331cf70d	Add test	2019-08-07 16:29:38 -07:00
Eddie Hung	ea8ac8fd74	Remove ice40_unlut	2019-08-07 16:29:38 -07:00
Eddie Hung	6b314c8371	Wrap SB_CARRY+SB_LUT into $__ICE40_FULL_ADDER	2019-08-07 16:29:38 -07:00
Eddie Hung	a206aed977	Run "opt_expr -fine" instead of "wreduce" due to #1213	2019-08-07 13:59:07 -07:00
Eddie Hung	6d77236f38	substr() -> compare()	2019-08-07 12:20:08 -07:00
Eddie Hung	7164996921	RTLIL::S{0,1} -> State::S{0,1}	2019-08-07 11:12:38 -07:00
Eddie Hung	48d0f99406	stoi -> atoi	2019-08-07 11:09:17 -07:00
Eddie Hung	915f4e34bf	DSP_MINWIDTH -> DSP_{A,B,Y}_MINWIDTH	2019-08-01 13:20:34 -07:00
Eddie Hung	cb505c50d3	Remove debug	2019-07-22 16:14:15 -07:00