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Fix $lut pin ordering inside $__ICE40_CARRY_WRAPPER

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Eddie Hung 2019-08-12 12:19:25 -07:00
parent 12c692f6ed
commit 8a2480526f
1 changed files with 1 additions and 1 deletions
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2
techlibs/ice40/cells_map.v
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@ -75,7 +75,7 @@ module \$__ICE40_CARRY_WRAPPER (output CO, O, input A, B, CI, I0, I3);
.WIDTH(4),
.LUT(LUT)
) lut (
.A({I3,B,A,I0}),
.A({I0,A,B,I3}),
.Y(O)
);
endmodule