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11452 commits 122 branches 59 tags 72 MiB
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3663 commits

Author SHA1 Message Date
Alberto Gonzalez
2fff574741
Barebones implementation of qbfsat command. 2020-04-04 22:13:25 +00:00
Alberto Gonzalez
fb878b2a70
Initial skeleton for qbfsat command. 2020-04-04 22:13:25 +00:00
Alberto Gonzalez
a0416fe167
Rename -duplicate to -push-copy. 
Co-Authored-By: whitequark <whitequark@whitequark.org>
 2020-04-04 21:26:11 +00:00
Alberto Gonzalez
409e2ac09d
Add -duplicate option to the design command. 2020-04-03 16:46:35 +00:00
whitequark
745251a31f splitnets: skip modules with processes. 2020-04-03 11:27:19 +00:00
whitequark
e0def9e4d9 memory_map: add -attr option, to respect inference attributes. 
Before this commit, memory_map (which is always a part of a synth
script) would always pick up any $mem cell that was not processed
by a preceding pass and lower it down to $dff/$mux cells.
This is undesirable for two reasons:
  * If there is an explicit inference attribute set on a $mem cell,
    e.g. (* ram_block *), then it is arguably incorrect to map such
    a memory to $dff/$mux cells.
  * If memory_map tries to lower a memory that was intended to
    be mapped to a large BRAM, it often takes extraordinarily long
    time to finish, produces an extremely large log file, and outputs
    an unusable design.

After this commit, properly invoked memory_map will not map any
memory that has an explicit inference attribute specified, solving
the first issue, and alleviating the second. The default behavior
is not changed.
 2020-04-03 05:51:40 +00:00
Eddie Hung
5f662b1c43
Merge pull request #1767 from YosysHQ/eddie/idstrings 
IdString: use more ID::*, make them easier to use, speed up IdString::in()
 2020-04-02 11:47:25 -07:00
Eddie Hung
956ecd48f7 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
Marcin Kościelnicki
2d3753d730 iopadmap: Fix z assignment to inout port 
Fixes #1841.
 2020-04-02 18:15:04 +02:00
Claire Wolf
22ef5701c0
Merge pull request #1842 from YosysHQ/mwk/fix-deminout-xz 
deminout: prevent any constant assignment from demoting to input
 2020-04-02 18:14:34 +02:00
Eddie Hung
fdafb74eb7 kernel: use more ID::* 2020-04-02 07:14:08 -07:00
Eddie Hung
37f42fe102
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup 
kernel: speedup by using more pass-by-const-ref
 2020-04-02 07:13:33 -07:00
Eddie Hung
c90324662c
Merge pull request #1828 from YosysHQ/eddie/celltypes_speedup 
kernel: share a single CellTypes within a pass
 2020-04-01 14:17:45 -07:00
Eddie Hung
4ae7f3a8ed
Merge pull request #1790 from YosysHQ/eddie/opt_expr_xor 
opt_expr: optimise $xor/$xnor/$_XOR_/$_XNOR_ -s with constant inputs
 2020-04-01 14:17:01 -07:00
Eddie Hung
e79bc45975
Merge pull request #1789 from YosysHQ/eddie/opt_expr_alu 
opt_expr: improve performance on $alu and $sub
 2020-04-01 14:11:09 -07:00
Eddie Hung
1bb5a5215f
Merge pull request #1761 from YosysHQ/eddie/opt_merge_speedup 
opt_merge: speedup
 2020-03-31 14:50:32 -07:00
Eddie Hung
3e88ede061
Merge pull request #1835 from boqwxp/cleanup_sat_expose 
Clean up pseudo-private member usage in `passes/sat/expose.cc`.
 2020-03-30 13:05:12 -07:00
Eddie Hung
0d878ca256
Merge pull request #1832 from boqwxp/cleanup_passes_cmds_design 
Clean up pseudo-private member usage in `passes/cmds/design.cc`.
 2020-03-30 11:56:17 -07:00
Eddie Hung
2c0739cbad
Merge pull request #1786 from boqwxp/hierarchycc_cleanup 
Clean up pseudo-private member usage in `passes/hierarchy/hierarchy.cc`.
 2020-03-30 11:37:51 -07:00
Eddie Hung
9f7d20a653
Merge pull request #1831 from boqwxp/cleanup_sat_eval 
Clean up pseudo-private member usage in `passes/sat/eval.cc`.
 2020-03-30 11:13:53 -07:00
Eddie Hung
769c7318e7
Merge pull request #1833 from boqwxp/cleanup_sat_freduce 
Clean up pseudo-private member usage in `passes/sat/freduce.cc`.
 2020-03-30 11:13:06 -07:00
Alberto Gonzalez
00544cffab
Remove unused function parameter. 2020-03-30 18:00:19 +00:00
Alberto Gonzalez
5a0f029e23
Simplify iterating over selected modules or cells. 
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
 2020-03-30 17:56:07 +00:00
Alberto Gonzalez
7fc0938bb6
Replace RTLIL::id2cstr() with log_id(). 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-30 16:50:36 +00:00
Alberto Gonzalez
4c92f9380c
Fix double deletion in passes/hierarchy/hierarchy.cc. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-30 16:43:54 +00:00
Alberto Gonzalez
f4faa1514b
Further clean up passes/sat/eval.cc. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-30 16:38:35 +00:00
Alberto Gonzalez
9f265dfd3f
Further clean up passes/sat/freduce.cc. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-03-30 16:25:30 +00:00
Alberto Gonzalez
696660351f
Clean up more in passes/sat/expose.cc. 
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
 2020-03-30 16:16:16 +00:00
Eddie Hung
1d93d1e59f memory_share: fix stray brace 2020-03-30 08:35:40 -07:00
Eddie Hung
4d897975a8 Code review fixes 2020-03-30 08:22:46 -07:00
Eddie Hung
f64d59d824
Apply suggestions from code review 
Co-Authored-By: Alberto Gonzalez <61295559+boqwxp@users.noreply.github.com>
 2020-03-30 08:19:56 -07:00
Marcin Kościelnicki
f68985f997 deminout: prevent any constant assignment from demoting to input 
Before this patch,

```
module top(inout io);
assign io = 1'bx;
endmodule
```

would have the `io` pin demoted to input (same happens for `1'bz`,
but not for `1'b0` or `1'b1`), resulting in check failures later on.

Part of fix for #1841.
 2020-03-30 15:04:31 +02:00
N. Engelhardt
2c847e7efe
Merge pull request #1778 from rswarbrick/sv-defines 
Add support for SystemVerilog-style `define to Verilog frontend
 2020-03-30 13:51:12 +02:00
Miodrag Milanovic
1dbc701728 Explicit include of csignal 2020-03-28 09:49:08 +01:00
Miodrag Milanovic
5cdcd6ec79 windows - there are no stopping signals 2020-03-28 09:09:11 +01:00
Alberto Gonzalez
1197a43380
Clean up pseudo-private member usage in passes/sat/expose.cc. 2020-03-28 06:18:09 +00:00
Alberto Gonzalez
9a0cdc3835
Clean up pseudo-private member usage in passes/sat/freduce.cc. 2020-03-28 06:08:23 +00:00
Alberto Gonzalez
4681f02a6e
Clean up pseudo-private member usage in passes/cmds/design.cc. 2020-03-28 05:10:18 +00:00
Alberto Gonzalez
b63b2dbbc3
Clean up pseudo-private member usage in passes/sat/eval.cc. 2020-03-28 03:11:23 +00:00
Rupert Swarbrick
044ca9dde4 Add support for SystemVerilog-style `define to Verilog frontend 
This patch should support things like

  `define foo(a, b = 3, c)   a+b+c

  `foo(1, ,2)

which will evaluate to 1+3+2. It also spots mistakes like

  `foo(1)

(the 3rd argument doesn't have a default value, so a call site is
required to set it).

Most of the patch is a simple parser for the format in preproc.cc, but
I've also taken the opportunity to wrap up the "name -> definition"
map in a type, rather than use multiple std::map's.

Since this type needs to be visible to code that touches defines, I've
pulled it (and the frontend_verilog_preproc declaration) out into a
new file at frontends/verilog/preproc.h and included that where
necessary.

Finally, the patch adds a few tests in tests/various to check that we
are parsing everything correctly.
 2020-03-27 16:08:26 +00:00
Eddie Hung
d40f12252b kernel: clear some more ShareWorker state 2020-03-26 15:05:45 -07:00
Claire Wolf
590d8eccb7
Merge pull request #1806 from YosysHQ/mwk/techmap-replace-fix 
techmap: Fix cell names with _TECHMAP_REPLACE_.*
 2020-03-26 19:03:37 +01:00
N. Engelhardt
3e46faa58c
Merge pull request #1763 from boqwxp/issue1762 
Closes #1762. Adds warnings for `select` arguments not matching any object and for `add` command when no modules selected
 2020-03-23 20:14:13 +01:00
Alberto Gonzalez
0da65d498b
Do not warn on empty selection with prefixed arg_memb. 
Co-Authored-By: N. Engelhardt <nak@symbioticeda.com>
 2020-03-23 17:50:11 +00:00
Alberto Gonzalez
ca4e5dd56e
Suppress warnings for empty select arguments when -count or -assert-* options are set. 2020-03-23 17:30:53 +00:00
Marcin Kościelnicki
c2bf11e42a techmap: Fix cell names with _TECHMAP_REPLACE_.* 
Fixes #1804.
 2020-03-23 11:17:07 +01:00
N. Engelhardt
91d12f4d59
Merge pull request #1785 from boqwxp/mitercc_cleanup 
Clean up pseudo-private member usage in `passes/sat/miter.cc`.
 2020-03-23 11:10:39 +01:00
Alberto Gonzalez
5026f36250
Warn on empty selection for add command. 2020-03-23 05:58:12 +00:00
R. Ou
c34969d3f1 iopadmap: Attempt to give new wires/cells meaningful names 2020-03-22 23:01:09 +01:00
Eddie Hung
0c0dc4ffc3 opt_expr: fix failing $xnor test 2020-03-20 14:39:08 -07:00