Krystine Sherwin
4f49a7fe18
analogdevices: Add BRAM options
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Enable `-force-params`, and tidy up lutram mapping too.
2025-10-18 12:59:55 +13:00
Krystine Sherwin
72208095dd
memory_libmap: Add -force-params
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Reduce complexity for adi brams by unconditionally providing the WIDTH and ABITS parameters.
2025-10-18 12:58:25 +13:00
Lofty
44a1b4ce3f
analogdevices: timings for t40lp
2025-10-14 14:13:15 +01:00
Lofty
bbc47dab05
analogdevices: use single tech param
2025-10-14 14:13:15 +01:00
Lofty
afadd4da82
analogdevices: expreso does not care about clock buffers
2025-10-14 14:13:15 +01:00
Lofty
7428be6081
analogdevices: prepare for t40lp timings
2025-10-14 14:13:15 +01:00
Krystine Sherwin
3d6a850101
analogdevices: Adding RBRAM2 and -tech
2025-10-14 14:13:15 +01:00
Krystine Sherwin
4eb79a56e5
analogdevices: (some) Native BRAM
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Specifically, the SDP configurations for RBRAM (ignoring 2048x09 because it makes the memlib format unhappy).
Drop the unused defines from the synth pass.
Remove comments from the lutram files referencing xilinx.
2025-10-14 14:13:15 +01:00
Krystine Sherwin
b679cecd19
analogdevices: Update lutram.ys test
2025-10-14 14:13:15 +01:00
Krystine Sherwin
ac7ee22a2e
analogdevices: Native LUTRAM primitives
2025-10-14 14:13:15 +01:00
Lofty
41c0a91e9d
analogdevices: LUTRAM config
2025-10-14 14:13:15 +01:00
Lofty
1fc42f08f6
analogdevices: update timing model
2025-10-14 14:13:15 +01:00
Lofty
44b5f3c552
I thought I removed this...
2025-10-14 14:13:15 +01:00
Lofty
64c2491c24
analogdevices: user retargeting
2025-10-14 14:13:15 +01:00
Lofty
dcc2c3e86f
analogdevices: more housekeeping
2025-10-14 14:13:15 +01:00
Lofty
1b0eee8c24
analogdevices: remove some extra cells!
2025-10-14 14:13:15 +01:00
Lofty
40dbea0235
test suite
2025-10-14 14:13:15 +01:00
Lofty
58701cb380
synth_analogdevices: remove scopeinfo cells
2025-10-14 14:13:15 +01:00
Lofty
4ca199c9a2
Create synth_analogdevices
2025-10-14 14:13:15 +01:00
Emil J
109abd3224
Merge pull request #5421 from YosysHQ/emil/sort-pass
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sort: init
2025-10-14 10:51:25 +02:00
github-actions[bot]
25f2a88770
Bump version
2025-10-14 00:22:29 +00:00
Emil J. Tywoniak
e5edd2acdb
sort: init
2025-10-13 17:32:26 +02:00
Emil J
71eadc9ab5
Merge pull request #5418 from yrabbit/gw5-dff-and-memory
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Gowin. Reduce the range of flip-flop types.
2025-10-13 17:26:56 +02:00
Jannis Harder
84b5ec856e
Merge pull request #4320 from YosysHQ/ywb_asserts
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write_btor: Include `$assert` and `$assume` cells in -ywmap output
2025-10-13 15:30:11 +02:00
Miodrag Milanovic
9570b39519
verifix: fix bits() deprecation warnings
2025-10-13 09:57:22 +02:00
Miodrag Milanovic
2f8f421dee
verifix: fix bits() deprecation warnings
2025-10-13 09:47:18 +02:00
YRabbit
02e40e8118
Gowin. Reduce the range of flip-flop types.
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UG303-1.0E_Arora Ⅴ Configurable Function Unit (CFU) User Guide.pdf
specifies that the only flip-flop types supported in GW5 are DFFSE,
DFFRE, DFFPE, and DFFCE.
However, the bit streams generated by the vendor IDE also contain DFF
flip-flops, which are probably the result of optimisation, so we leave
them in the list of permitted items, but add a flag that will allow the
generation of completely correct output files, acceptable for further P&
R using vendor tools (they will not allow the use of flip-flops other
than the four specified in the netlist).
In the GW5 SemiDual Port BSRAM series, the primitive does not have
RESETA and RESETB ports—they are replaced by the RESET port, so we
separate the files for BSRAM generation, especially since in the future
we may have to take into account other, as yet unexplored, differences
in BSRAM.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2025-10-11 21:12:35 +10:00
Emil J
9a12d92551
Merge pull request #5386 from YosysHQ/emil/liberty-glob-all
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Expand wildcards in Liberty file consumers
2025-10-09 20:21:48 +02:00
Krystine Sherwin
1a0b5d8ea7
write_btor: Include $assert and $assume cells in -ywmap output
2025-10-09 14:50:36 +02:00
github-actions[bot]
89f32a415b
Bump version
2025-10-09 00:22:39 +00:00
Emil J
a80462f27f
Merge pull request #5339 from rocallahan/fast-rtlil-parser
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Rewrite the RTLIL parser for efficiency
2025-10-08 14:52:37 +02:00
Miodrag Milanović
b7a72811cc
Merge pull request #5408 from rocallahan/atomic-mfp
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Make `mfp` const methods thread-safe.
2025-10-08 13:08:16 +02:00
Miodrag Milanović
ba1a347d59
Merge pull request #5370 from donn/pyosys_pybind11
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pyosys: rewrite using pybind11
2025-10-08 13:07:59 +02:00
Miodrag Milanović
869910055f
Merge pull request #3908 from YosysHQ/ecp5_2_lattice
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synth_ecp5 and synth_nexus to synth_lattice
2025-10-08 13:07:33 +02:00
Miodrag Milanović
4cdaac003f
Merge pull request #3991 from adrianparvino/alumacc-sign
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alumacc: merge independent of sign
2025-10-08 13:02:10 +02:00
Miodrag Milanovic
1d2d777678
Next dev cycle
2025-10-08 09:25:33 +02:00
Miodrag Milanovic
157aabb583
Release version 0.58
2025-10-08 07:51:14 +02:00
github-actions[bot]
47ca09a016
Bump version
2025-10-08 00:22:29 +00:00
Miodrag Milanović
35bade56da
Merge pull request #5410 from jix/abc_new-fix-zbuf-churn
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abc_new: Avoid bufnorm helper cell churn
2025-10-07 19:25:46 +02:00
Jannis Harder
2c94ca85d9
abc_new: Avoid bufnorm helper cell churn
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We were performing the helper passes `abc9_ops -replace_zbufs` and
`abc9_ops -restore_zbufs` for every module, but those passes act on the
full design (and can't be applied entirely selectively due to entering
and leaving bufnorm).
This lead to an explosive creation of a lot of redundant bufnorm helper
cells that would have been cleaned up by `clean` but that never ran.
Instead we now run each helper pass once, one before and one after
iterating over the selected modules. This limits the number of bufnorm
helper cells.
2025-10-07 18:05:28 +02:00
github-actions[bot]
b8b0f80f79
Bump version
2025-10-07 00:23:02 +00:00
Robert O'Callahan
2f81c55389
Make mfp const methods thread-safe.
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In particular, we make the parent links relaxed atomics so concurrent
`ifind()` calls are safe.
This may appear to cause a tiny performance regression but as discussed
in https://yosyshq.discourse.group/t/parallel-optmergepass-implementation/87/16
this is probably just noise.
2025-10-06 22:44:01 +00:00
Krystine Sherwin
da2e021e3b
abc9.cc: Use -r for &dch
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Avoids "ABC: The command has to terminate. Boxes are not in a topological order." error during `&if`.
2025-10-06 14:07:40 +01:00
github-actions[bot]
637665c9d3
Bump version
2025-10-04 00:21:39 +00:00
Miodrag Milanović
ed4eb6d331
Merge pull request #5406 from YosysHQ/verific_import_err_print_src
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verific: print source location of problematic object on import error
2025-10-03 14:05:05 +02:00
N. Engelhardt
0b6adf832b
verific: print source location of problematic object on import error (if available)
2025-10-03 12:57:49 +02:00
Mohamed Gaber
440e331ae0
docs: proofread pyosys.rst
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Primarily address feedback from @KrystalDelusion (thanks!)
2025-10-03 11:54:44 +03:00
Mohamed Gaber
93fae3c606
docs: write small guide for using pyosys
2025-10-03 11:54:44 +03:00
Mohamed Gaber
80fcce64da
pyosys: fix ref-only classes, implicit conversions
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+ cleanup
2025-10-03 11:54:44 +03:00
Mohamed Gaber
c8404bf86b
pyosys/hashlib: equivalence operators
2025-10-03 11:54:44 +03:00
