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									 Eddie Hung | 4dac9818bd | Update LUT delays | 2019-04-10 08:49:39 -07:00 |  | 
				
					
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									 Eddie Hung | 3e368593eb | Add cells.lut to techlibs/xilinx/ | 2019-04-09 14:33:37 -07:00 |  | 
				
					
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									 Eddie Hung | fd88ab5c83 | synth_xilinx to call abc with -lut +/xilinx/cells.lut | 2019-04-09 14:32:39 -07:00 |  | 
				
					
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									 Eddie Hung | b9e19071b8 | Add delays to cells.box | 2019-04-09 14:32:10 -07:00 |  | 
				
					
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									 Eddie Hung | d536379c62 | Add "-lut <file>" support to abc9 | 2019-04-09 14:31:31 -07:00 |  | 
				
					
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									 Eddie Hung | f2042fc7c4 | synth_xilinx with abc9 to use -box | 2019-04-09 11:01:46 -07:00 |  | 
				
					
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									 Eddie Hung | 2ae26b986c | Add techlibs/xilinx/cells.box | 2019-04-09 10:58:58 -07:00 |  | 
				
					
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									 Eddie Hung | 7e304c362b | Add "-box" option to abc9 | 2019-04-09 10:58:06 -07:00 |  | 
				
					
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									 Eddie Hung | bd523abef5 | Add 'setundef -zero' call prior to aigmap in abc9 | 2019-04-09 10:32:58 -07:00 |  | 
				
					
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									 Eddie Hung | 3b6f85b0a6 | Comment out | 2019-04-09 10:09:43 -07:00 |  | 
				
					
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									 Eddie Hung | 3fc474aa73 | Add support for synth_xilinx -abc9 and ignore abc9 -dress opt | 2019-04-09 10:06:44 -07:00 |  | 
				
					
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									 Eddie Hung | 12c34136ba | More space fixing | 2019-04-08 16:40:17 -07:00 |  | 
				
					
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									 Eddie Hung | 36efec01b8 | Fix spacing | 2019-04-08 16:37:22 -07:00 |  | 
				
					
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									 Eddie Hung | bca3cf6843 | Merge branch 'master' into xaig | 2019-04-08 16:31:59 -07:00 |  | 
				
					
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									 Clifford Wolf | e194e65358 | Merge pull request #919 from YosysHQ/multiport_transp memory_bram: Fix multiport make_transp | 2019-04-08 21:14:05 +02:00 |  | 
				
					
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									 David Shah | 2bf3ca6443 | memory_bram: Fix multiport make_transp Signed-off-by: David Shah <dave@ds0.me> | 2019-04-07 16:56:31 +01:00 |  | 
				
					
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									 Clifford Wolf | dfb242c905 | Add "read_ilang -lib" Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-04-05 17:31:49 +02:00 |  | 
				
					
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									 Clifford Wolf | 75ca06526a | Added missing argument checking to "mutate" command Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-04-04 18:10:10 +02:00 |  | 
				
					
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									 Eddie Hung | ef84b434a5 | Merge pull request #913 from smunaut/fix_proc_mux proc_mux: Fix crash when trying to optimize non-existant mux to shiftx | 2019-04-03 06:27:41 -07:00 |  | 
				
					
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									 Sylvain Munaut | 39380c45ba | proc_mux: Fix crash when trying to optimize non-existant mux to shiftx last_mux_cell can be NULL ...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | 2019-04-03 14:50:12 +02:00 |  | 
				
					
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									 Clifford Wolf | 721fa1cbd8 | Merge pull request #912 from YosysHQ/bram_addr_en memory_bram: Consider read enable for address expansion register | 2019-04-03 10:00:18 +02:00 |  | 
				
					
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									 Clifford Wolf | 3f6554d698 | Merge pull request #910 from ucb-bar/memupdates Refine memory support to deal with general Verilog memory definitions. | 2019-04-03 09:59:11 +02:00 |  | 
				
					
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									 David Shah | 6acbc016f4 | memory_bram: Consider read enable for address expansion register Signed-off-by: David Shah <dave@ds0.me> | 2019-04-02 19:47:50 +01:00 |  | 
				
					
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									 Eddie Hung | aaa2690a56 | Merge pull request #895 from YosysHQ/pmux2shiftx RFC: Add a pmux-to-shiftx optimisation to proc_mux | 2019-04-02 00:16:14 -07:00 |  | 
				
					
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									 Jim Lawson | 73b87e7807 | Refine memory support to deal with general Verilog memory definitions. | 2019-04-01 15:02:12 -07:00 |  | 
				
					
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									 Clifford Wolf | 22035c20ff | Merge pull request #907 from YosysHQ/clifford/fix906 Build Verilog parser with -DYYMAXDEPTH=100000 | 2019-03-30 00:09:42 +01:00 |  | 
				
					
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									 Clifford Wolf | 584d2030bf | Build Verilog parser with -DYYMAXDEPTH=100000, fixes #906 Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-29 16:32:44 +01:00 |  | 
				
					
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									 Clifford Wolf | 32bd0f22ec | Merge pull request #901 from trcwm/libertyfixes Libertyfixes: accept superfluous ; at end of group. | 2019-03-28 09:32:05 +01:00 |  | 
				
					
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									 Clifford Wolf | 662429cc49 | Merge pull request #903 from YosysHQ/bram_reset_transp memory_bram: Reset make_transp when growing read ports | 2019-03-28 09:30:48 +01:00 |  | 
				
					
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									 David Shah | 60594ad40c | memory_bram: Reset make_transp when growing read ports Signed-off-by: David Shah <dave@ds0.me> | 2019-03-27 17:19:14 +00:00 |  | 
				
					
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									 Niels Moseley | 263ab60b43 | Liberty file parser now accepts superfluous ; | 2019-03-27 15:17:58 +01:00 |  | 
				
					
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									 Niels Moseley | ee130f67cd | Liberty file parser now accepts superfluous ; | 2019-03-27 15:16:19 +01:00 |  | 
				
					
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									 Niels Moseley | 487cb45b87 | Liberty file parser now accepts superfluous ; | 2019-03-27 15:15:53 +01:00 |  | 
				
					
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									 Clifford Wolf | 7682629b79 | Add "read -verific" and "read -noverific" Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-27 14:03:35 +01:00 |  | 
				
					
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									 Clifford Wolf | 2c7fe42ad1 | Add "rename -output" Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-27 13:47:42 +01:00 |  | 
				
					
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									 Clifford Wolf | d351b7cb99 | Improve "rename" help message Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-27 13:33:26 +01:00 |  | 
				
					
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									 Clifford Wolf | 38b3fbd3f0 | Add "cutpoint -undef" Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-26 16:01:14 +01:00 |  | 
				
					
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									 Clifford Wolf | d0b9b1bece | Add "hdlname" attribute Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-26 14:52:48 +01:00 |  | 
				
					
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									 Clifford Wolf | c863796e9f | Fix "verific -extnets" for more complex situations Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-26 14:17:46 +01:00 |  | 
				
					
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									 Clifford Wolf | ddc1a4488e | Add "cutpoint" pass Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-25 19:49:00 +01:00 |  | 
				
					
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									 Eddie Hung | b7a3d35c6b | Create one $shiftx per bit in width | 2019-03-25 11:16:56 -07:00 |  | 
				
					
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									 Clifford Wolf | 9ec50ca7b9 | Merge pull request #896 from YosysHQ/transp_fixes memory_bram: Fix multiclock make_transp | 2019-03-25 14:55:16 +01:00 |  | 
				
					
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									 Clifford Wolf | 2bb9632944 | Merge pull request #897 from trcwm/libertyfixes Liberty parser: Accept ranges [A:B], and ignore missing ';'. | 2019-03-25 14:47:33 +01:00 |  | 
				
					
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									 Niels Moseley | 1f7f54e68e | spaces -> tabs | 2019-03-25 14:12:04 +01:00 |  | 
				
					
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									 Niels Moseley | 9d9cc8a314 | EOL is now accepted as ';' replacement on lines that look like: feature_xyz(option) | 2019-03-25 12:15:10 +01:00 |  | 
				
					
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									 Niels Moseley | 3b3b77291a | Updated the liberty parser to accept [A:B] ranges (AST has not been updated). Liberty parser now also accepts key : value pair lines that do not end in ';'. | 2019-03-24 22:54:18 +01:00 |  | 
				
					
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									 David Shah | ac6cc88db3 | memory_bram: Fix multiclock make_transp Signed-off-by: David Shah <dave@ds0.me> | 2019-03-24 16:21:36 +00:00 |  | 
				
					
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									 Eddie Hung | 2507d01b03 | Add a pmux-to-shiftx optimisation to proc_mux | 2019-03-23 16:45:36 -07:00 |  | 
				
					
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									 Clifford Wolf | ccfa2fe01c | Add "mutate -none -mode", "mutate -mode none" Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-23 20:20:32 +01:00 |  | 
				
					
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									 Clifford Wolf | 59c44bb61a | Add "mutate -s <filename>" Signed-off-by: Clifford Wolf <clifford@clifford.at> | 2019-03-23 17:53:09 +01:00 |  |