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	Merge pull request #912 from YosysHQ/bram_addr_en
memory_bram: Consider read enable for address expansion register
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					 1 changed files with 2 additions and 0 deletions
				
			
		|  | @ -957,6 +957,8 @@ grow_read_ports:; | |||
| 					SigSpec addr_ok_q = addr_ok; | ||||
| 					if ((pi.clocks || pi.make_outreg) && !addr_ok.empty()) { | ||||
| 						addr_ok_q = module->addWire(NEW_ID); | ||||
| 						if (!pi.sig_en.empty()) | ||||
| 							addr_ok = module->Mux(NEW_ID, addr_ok_q, addr_ok, pi.sig_en); | ||||
| 						module->addDff(NEW_ID, pi.sig_clock, addr_ok, addr_ok_q, pi.effective_clkpol); | ||||
| 					} | ||||
| 
 | ||||
|  |  | |||
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