JesseDebuger
4afeab075a
Merge 46f9f887f7 into 5d7486115a
2026-06-19 04:11:28 +00:00
nella
5d7486115a
Merge pull request #5887 from YosysHQ/nella/fix-signedness-4402
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Fix: `read_verilog` doesn't respect `signed` keyword
2026-06-18 16:53:37 +00:00
nella
2195277b5a
Merge pull request #5960 from YosysHQ/nella/latch-infer
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proc_dlatch - infer $adlatch (Fix #5910 ).
2026-06-18 16:50:48 +00:00
nella
c99a037c33
Merge pull request #5886 from YosysHQ/nella/fix-signedness-5745
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Fix `chparam` values are unsigned when using read_verilog frontend
2026-06-18 16:50:22 +00:00
Miodrag Milanović
e2903c4a5c
Merge pull request #5959 from YosysHQ/improve_test
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Improve test
2026-06-16 08:46:11 +00:00
nella
c0709b1b4e
Fixup issue test.
2026-06-15 16:23:44 +02:00
nella
eb4703808a
Add tests.
2026-06-15 15:46:13 +02:00
Miodrag Milanovic
247bcfed65
Remove old Makefile and fix documentation
2026-06-15 15:25:58 +02:00
Emil J. Tywoniak
48c1e1a724
tests: remove hana test with multiple drivers
2026-06-15 15:08:26 +02:00
Miodrag Milanovic
2bab5d3fa5
Add VERBOSE (and V) option to Makefiles
2026-06-15 14:48:11 +02:00
nella
309b7d2496
Verify kogge stone impl.
2026-06-12 14:55:47 +02:00
nella
c44d24d9fd
Add missing -assert to equiv_opt calls.
2026-06-11 01:08:36 +02:00
nella
666bd53f06
Cleanup tests.
2026-06-08 13:47:56 +02:00
nella
3c6900a570
Depth-schedule finar adder.
2026-06-08 13:47:56 +02:00
nella
f8d2252735
Use ripple as default final adder, gate fma.
2026-06-08 13:47:56 +02:00
nella
d40431f249
Remove black boxes for now.
2026-06-08 13:29:05 +02:00
nella
5e4e5a1d40
Arith tree - parallel prefix.
2026-06-08 13:29:05 +02:00
nella
25eb394ad0
Collapse signed*signed or combined nodes via BW.
2026-06-08 13:29:05 +02:00
nella
6c13ec0efb
Test.
2026-06-08 13:29:05 +02:00
Miodrag Milanović
693d5a7eb0
Merge pull request #5903 from YosysHQ/krys/verific_memsize
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verific: Fix non-contiguous memory flattening producing out of bounds accesses in some cases
2026-06-04 05:43:04 +00:00
Miodrag Milanovic
ce280354cf
Update CI scripts for CMake
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Co-authored-by: Catherine <whitequark@whitequark.org>
2026-06-03 08:58:11 +00:00
Catherine
a727e7f6e7
Migrate build system to CMake
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See #5895 for details.
This commit does not include CI or documentation changes.
2026-06-03 08:58:10 +00:00
Catherine
bcc736ed7d
Revert "Putting back some Makefile.conf"
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This reverts commit d8587f44f0
2026-06-02 15:01:50 +00:00
Philippe Sauter
c89cfe1e6e
peepopt: add shiftpow2 pattern
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Rewrite power-of-two indexed word selects to $bmux when the shift
amount already carries the scale as low zero bits.
Keep the rule to non-overlapping selections and bound the generated
mux ways. Add regressions for aligned shifts, padding, signed
extension, and shiftmul handoff cases.
2026-05-31 02:01:32 +02:00
junyao
46f9f887f7
setundef: strip init attributes from undriven wires ( fixes #5835 )
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When `setundef -undriven` connects an undriven wire to a replacement
value, the wire's \\init attribute (if present) is now removed. Previously,
the init attribute was left intact, causing downstream passes like
opt_merge to report "Conflicting init values" errors because the init
value contradicted the newly assigned constant.
For wires that are entirely undriven, the init attribute is removed
completely. For partially undriven wires (where only some bits are
undriven), only the corresponding init bits are cleared to x.
Wires driven by flip-flops or other cells are not affected, as they
are excluded from the undriven signal set before this code runs.
2026-05-31 00:18:49 +08:00
Krystine Sherwin
0360a4bd0a
tests/check_mem: Drop unused init check
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It was also raising an error in `read_verilog`.
2026-05-30 11:06:11 +12:00
Emil J. Tywoniak
80bdbaa010
genrtlil: don't avoid emitting flops for nosync
2026-05-29 11:37:08 +02:00
Krystine Sherwin
52e0030cc5
tests/check_mem: Add problematic case
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Verific reports it as 16 2-bit addresses, meaning we have to iterate over the last dimension while skipping indices.
2026-05-29 18:40:25 +12:00
Krystine Sherwin
ab5f25db9a
Add test for non-contiguous memory init
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Also negative memory addresses.
2026-05-29 18:40:24 +12:00
Krystine Sherwin
aac7366862
tests: Add check_mem to vanilla-test
2026-05-29 18:40:24 +12:00
Krystine Sherwin
f6327cc444
check_mem: Add -non-const option
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Can identify potentially dangerous addressing, but also prone to false-positives.
2026-05-29 18:40:24 +12:00
Krystine Sherwin
07e3d648aa
Add check_mem command
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Comes with a set of tests which (currently) pass with `read_verilog` but fail with `verific` based on #5878 .
Add `--check-sv`, an alternative to `--prove-sv` with generator defined yosys commands. Helpful for when you want to run the same set of commands on a bunch of sv files.
2026-05-29 18:40:23 +12:00
Miodrag Milanović
1801abf30a
Merge pull request #5913 from YosysHQ/abcexternal
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Putting back some Makefile.conf
2026-05-28 09:49:16 +00:00
Miodrag Milanovic
d8587f44f0
Putting back some Makefile.conf
2026-05-28 11:13:29 +02:00
nella
d6106f141c
Add matching for fused mac operations for Nexus ( fix #5906 ).
2026-05-28 09:58:18 +02:00
junyao
6f111118de
proc: ignore nosync temporaries in always_latch checks
2026-05-26 00:56:07 +08:00
Miodrag Milanovic
4c8e61a52b
Expose SBY binary location
2026-05-19 16:08:21 +02:00
Miodrag Milanovic
07924a3c62
Use common.mk for sva tests as well
2026-05-19 15:15:41 +02:00
Miodrag Milanovic
2b3f4c37f5
Fix functional tests
2026-05-19 14:42:08 +02:00
Miodrag Milanovic
15e09163cd
Do not use Makefile.conf
2026-05-19 14:29:06 +02:00
Miodrag Milanovic
c0779f488a
Make out of tree build testing possible
2026-05-19 14:26:07 +02:00
Emil J. Tywoniak
1c831aa50d
threading: whitespace
2026-05-18 16:26:14 +02:00
Miodrag Milanovic
4a4c3a3be6
Make better validation
2026-05-18 08:50:38 +02:00
Miodrag Milanovic
ef092e1f15
Include conf so individual test running works
2026-05-18 08:50:20 +02:00
Leon White
59c1bc35cb
Fix aiger tests when ABCEXTERNAL is set
2026-05-16 09:12:20 +02:00
nella
38c2806636
Make sure to apply correct signedness to loop vars.
2026-05-13 16:52:07 +02:00
nella
7d3e56523b
Preserve param signedness across overrides.
2026-05-13 16:25:15 +02:00
Miodrag Milanovic
1ef6311e5b
Update documentation and few more defines
2026-05-13 11:24:45 +02:00
Miodrag Milanovic
7fe32137bd
Revert "Fix tests due to ABC improvements"
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This reverts commit 417e871b06
2026-05-11 14:47:08 +02:00
Emil J
1f02343268
Merge pull request #5817 from YosysHQ/emil/clockgate-reject-sdffe
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clockgate: reject $sdffe to fix priority handling
2026-05-08 18:38:51 +00:00
