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Author	SHA1	Message	Date
Eddie Hung	4a76b425cc	Misspell	2019-05-28 08:44:59 -07:00
Eddie Hung	89bd6b8504	If driver not found, use LUT2	2019-05-27 23:12:21 -07:00
Eddie Hung	3eec100748	Parse "a" extension and boxes from map file	2019-05-27 23:11:21 -07:00
Eddie Hung	3f60061615	Map file to include boxes not CI/CO	2019-05-27 23:10:59 -07:00
Eddie Hung	e032e5bcde	Make MUXF{7,8} and CARRY4 whitebox	2019-05-27 23:09:06 -07:00
Eddie Hung	54e28eb3ea	Re-enable lib_whitebox	2019-05-27 23:08:55 -07:00
Eddie Hung	4df37c77fd	Disconnect all ABC boxes too	2019-05-27 19:40:27 -07:00
Eddie Hung	428d7c8e11	Remove unused function	2019-05-27 13:49:42 -07:00
Eddie Hung	e115e736fa	parse_xaiger to not parse symbol table	2019-05-27 12:34:17 -07:00
Eddie Hung	75bd41eaeb	Parse without wideports	2019-05-27 12:22:05 -07:00
Eddie Hung	bf3b8d5e45	Remove mapped_mod when done	2019-05-27 12:19:21 -07:00
Eddie Hung	234156c01a	Instantiate cell type (from sym file) otherwise 'clean' warnings	2019-05-27 12:16:10 -07:00
Eddie Hung	03b289a851	Add 'cinput' and 'coutput' to symbols file for boxes	2019-05-27 11:38:52 -07:00
Eddie Hung	3c8368454f	Fix "a" connectivity	2019-05-26 14:14:13 -07:00
Eddie Hung	4311b9b583	Blackboxes	2019-05-26 11:32:02 -07:00
Eddie Hung	3981eba999	ABC9 to call &sweep	2019-05-26 11:31:35 -07:00
Eddie Hung	67f7c64a77	Fix padding, remove CIs from undriven_bits before erasing undriven POs	2019-05-26 11:26:38 -07:00
Eddie Hung	086b6560b4	Typo	2019-05-26 03:17:20 -07:00
Eddie Hung	66701c5fcc	Muck about with LUT delays some more	2019-05-26 02:52:48 -07:00
Eddie Hung	823153e418	Combine ABC_COMMAND_LUT	2019-05-26 02:47:06 -07:00
Eddie Hung	32a4c10c0d	Fix "a" extension	2019-05-26 02:44:36 -07:00
Eddie Hung	01684643b6	Fix "write_xaiger", and to write each box contents into holes	2019-05-25 22:34:50 -07:00
Eddie Hung	73c98f2ae2	Merge remote-tracking branch 'origin/master' into xc7mux	2019-05-25 20:50:47 -07:00
Clifford Wolf	a90eec12c9	Merge pull request #1041 from YosysHQ/clifford/fix1040 ... Fix handling of offset and upto module ports in write_blif	2019-05-25 19:17:05 +02:00
Clifford Wolf	6352df42ae	Fix handling of offset and upto module ports in write_blif, fixes #1040 ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-05-25 17:45:14 +02:00
Eddie Hung	ca5774ed40	Try new LUT delays	2019-05-24 20:39:55 -07:00
Eddie Hung	6ad09bfcea	Add &fraig and &mfs back	2019-05-24 15:10:18 -07:00
Eddie Hung	60af2ca94d	Transpose CARRY4 delays	2019-05-24 14:09:15 -07:00
Clifford Wolf	b7dd7c2dcd	Add proper error message for btor recursion_guard ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-05-24 16:22:34 +02:00
Eddie Hung	52e9036d39	Merge remote-tracking branch 'origin/master' into xc7mux	2019-05-23 13:38:04 -07:00
Eddie Hung	68359bcd6f	Merge remote-tracking branch 'origin/eddie/opt_rmdff' into xc7mux	2019-05-23 13:37:53 -07:00
Eddie Hung	67a4850e35	Merge pull request #1036 from YosysHQ/eddie/xilinx_dram ... Add "min bits" and "min wports" to xilinx dram rules	2019-05-23 13:13:10 -07:00
Eddie Hung	5ac7e38d0a	Fix spacing	2019-05-23 12:58:30 -07:00
Eddie Hung	99a3fee8f4	Add "min bits" and "min wports" to xilinx dram rules	2019-05-23 11:32:28 -07:00
Eddie Hung	47f9ea142f	Add opt_rmdff tests	2019-05-23 11:26:38 -07:00
Eddie Hung	50ed34a6d0	opt_rmdff to work on $dffe and $_DFFE_*	2019-05-23 11:26:18 -07:00
Eddie Hung	ae89e6ab26	Add whitebox support to DRAM	2019-05-23 08:58:57 -07:00
Clifford Wolf	ca46947354	Merge pull request #1031 from mdaiter/optimizeLookupTableBtor ... Optimize numberOfPermutations	2019-05-23 13:52:48 +02:00
Matthew Daiter	f0ff31ceea	Optimize numberOfPermutations	2019-05-22 17:29:50 -04:00
Clifford Wolf	5c164d0863	Merge pull request #1019 from YosysHQ/clifford/fix1016 ... Add "wreduce -keepdc"	2019-05-22 13:29:04 +02:00
Clifford Wolf	84d91420e4	Merge pull request #1021 from ucb-bar/fixfirrtl_shr,neg ... Fix static shift operands, neg result type, minor formatting	2019-05-22 12:01:19 +02:00
Eddie Hung	4f44e3399b	shift register inference before mux	2019-05-22 02:36:28 -07:00
Eddie Hung	9b1078b9bd	Fix/workaround symptom unveiled by #1023	2019-05-21 18:50:02 -07:00
Eddie Hung	cb24d23b6d	Merge pull request #1024 from YosysHQ/eddie/fix_Wmissing_braces	2019-05-21 18:20:58 -07:00
Eddie Hung	7057753427	Rename label	2019-05-21 18:20:31 -07:00
Eddie Hung	b5a29460b9	Try again	2019-05-21 17:20:19 -07:00
Eddie Hung	1bff09f2ff	Fix warning	2019-05-21 16:26:20 -07:00
Eddie Hung	ee8435b820	Instead of MUXCY/XORCY use CARRY4 (with timing)	2019-05-21 16:19:45 -07:00
Eddie Hung	0f094fba08	Pad all boxes so that all input/output connections specified	2019-05-21 16:19:23 -07:00
Eddie Hung	36a219063a	Modify LUT area cost to be same as old abc	2019-05-21 14:31:19 -07:00