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Author	SHA1	Message	Date
Eddie Hung	3b9b0fcd06	Tidy up synth_ice40, only restrict DSP_B_MINWIDTH=2	2019-09-19 14:57:38 -07:00
Eddie Hung	64a72ed51e	Do not perform width-checks for DSP48E1 which is much more complicated	2019-09-19 14:50:11 -07:00
Eddie Hung	517ca49963	Remove TODO as check should not be necessary	2019-09-19 14:49:47 -07:00
Eddie Hung	307b2dc8e5	Revert index to select	2019-09-19 14:46:53 -07:00
Eddie Hung	ea5e5a212e	Cleanup xilinx_dsp too	2019-09-19 14:34:06 -07:00
Eddie Hung	1a0f7ed09c	Refactor ce{mux,pol} -> hold{mux,pol}	2019-09-19 14:27:25 -07:00
Eddie Hung	429c9852ce	Add HOLD/RST support for SB_MAC16	2019-09-19 14:02:55 -07:00
Eddie Hung	2766465a2b	Add support for SB_MAC16 CD and H registers	2019-09-19 12:14:33 -07:00
Eddie Hung	c8310a6e76	Refactor ice40_dsp.pmg	2019-09-19 12:00:48 -07:00
Eddie Hung	0020a18929	Add more entries	2019-09-19 12:00:39 -07:00
Eddie Hung	65fa8adf6c	Format macc.v	2019-09-19 11:02:14 -07:00
Eddie Hung	29d446d758	Cleanup	2019-09-19 10:39:00 -07:00
Eddie Hung	c663a3680b	Remove stat	2019-09-18 12:44:34 -07:00
Eddie Hung	f7dbfef792	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-09-18 12:40:21 -07:00
Eddie Hung	b66c99ece0	Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext ... peepopt_dffmux -- bit optimisations for word level $dff + (enable/reset) $mux cells	2019-09-18 12:40:08 -07:00
Eddie Hung	44bf4ac35c	Add doc on pattern detector for overflow	2019-09-18 12:35:24 -07:00
Eddie Hung	fd3b033903	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-09-18 12:23:22 -07:00
Eddie Hung	25e0f0c376	Fix copy-paste	2019-09-18 12:19:16 -07:00
Eddie Hung	347cbf59bd	Check overflow condition is power of 2 without using int32	2019-09-18 12:16:03 -07:00
Eddie Hung	c9fe4d7992	Add .gitignore	2019-09-18 12:11:33 -07:00
Eddie Hung	c3cba7ab93	Refine macc testcase	2019-09-18 12:07:25 -07:00
Eddie Hung	b77cf6ba48	Mis-spell	2019-09-18 11:12:46 -07:00
Eddie Hung	e992dbf2c5	Add pattern detection support for DSP48E1 model, check against vendor	2019-09-18 10:45:04 -07:00
Eddie Hung	3ec28ec53a	Merge pull request #1379 from mmicko/sim_models ... Added simulation models for Efinix and Anlogic	2019-09-18 10:04:27 -07:00
Eddie Hung	1f18736d20	Add support for overflow using pattern detector	2019-09-18 09:39:59 -07:00
Eddie Hung	0932e23dff	Separate dffrstmux from dffcemux, fix typos	2019-09-18 09:34:42 -07:00
Miodrag Milanovic	3e9449cb0b	make note that it is for latch mode	2019-09-18 17:48:16 +02:00
Miodrag Milanovic	b0ca6de472	better lut handling	2019-09-18 17:45:19 +02:00
Miodrag Milanovic	8badd4d812	better handling of lut and begin/end add	2019-09-18 17:45:07 +02:00
Clifford Wolf	779ce3537f	Add "write_aiger -L" ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-09-18 13:33:02 +02:00
Clifford Wolf	b88d2e5f30	Fix stupid bug in btor back-end ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-09-18 11:56:14 +02:00
Clifford Wolf	36df37a734	Bump version ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-09-16 13:05:41 +02:00
Clifford Wolf	861f2af5aa	Merge pull request #1380 from YosysHQ/clifford/fix1372 ... Fix handling of range selects on loop variables	2019-09-16 13:05:02 +02:00
Clifford Wolf	25b08b1afd	Fix handling of range selects on loop variables, fixes #1372 ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-09-16 11:25:37 +02:00
Eddie Hung	2b93b8fc74	Merge pull request #1374 from YosysHQ/eddie/fix1371 ... Fix two non-deterministic behaviours that cause divergence between compilers	2019-09-15 13:56:07 -07:00
Marcin Kościelnicki	09ac36da60	xilinx: Make blackbox library family-dependent. ... Fixes #1246.	2019-09-15 13:37:24 +02:00
Clifford Wolf	d9f99745da	Merge pull request #1377 from YosysHQ/clifford/fixzdigit ... Fix handling of z_digit "?" and fix optimization of cmp with "z"	2019-09-15 11:04:31 +02:00
Miodrag Milanovic	3487b95224	Added simulation models for Efinix and Anlogic	2019-09-15 09:37:16 +02:00
Eddie Hung	f492567c87	Oops	2019-09-13 18:19:07 -07:00
Eddie Hung	681be20ca2	Add `undef DSP48E1_INST	2019-09-13 17:07:18 -07:00
Eddie Hung	a2eee9ebef	Add counter-example from @cliffordwolf	2019-09-13 16:41:10 -07:00
Eddie Hung	14d72c39c3	Revert "Make one check $shift(x)? only; change testcase to be 8b" ... This reverts commit e2c2d784c8.	2019-09-13 16:33:18 -07:00
Eddie Hung	9a84e4711c	Spacing	2019-09-13 16:30:44 -07:00
Eddie Hung	9a73adde50	Explicitly order function arguments	2019-09-13 16:18:05 -07:00
Eddie Hung	61877e1370	Fix D -> P{,COUT} delay	2019-09-13 13:32:55 -07:00
Eddie Hung	d0b202c58d	Add no MULT no DPORT config	2019-09-13 12:05:14 -07:00
Eddie Hung	247a63f55d	Add support for MULT and DPORT	2019-09-13 11:45:55 -07:00
Eddie Hung	5473e597bf	Use template specialisation	2019-09-13 11:13:57 -07:00
Eddie Hung	95e80809a5	Revert "SigSet<Cell*> to use stable compare class" ... This reverts commit 4ea34aaacd.	2019-09-13 09:49:15 -07:00
Eddie Hung	e235dd0785	Refine diagram	2019-09-13 09:34:40 -07:00