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This commit is contained in:
Eddie Hung 2019-09-19 10:39:00 -07:00
parent c663a3680b
commit 29d446d758

View file

@ -398,10 +398,8 @@ endmatch
code argQ argD
{
if (clock != SigBit()) {
if (port(ff, \CLK) != clock)
reject;
}
if (clock != SigBit() && port(ff, \CLK) != clock)
reject;
SigSpec Q = port(ff, \Q);
if (ffoffset + GetSize(argQ) > GetSize(Q))
@ -580,10 +578,8 @@ endmatch
code argQ
if (ff) {
if (clock != SigBit()) {
if (port(ff, \CLK) != clock)
reject;
}
if (clock != SigBit() && port(ff, \CLK) != clock)
reject;
SigSpec D = port(ff, \D);
if (ffoffset + GetSize(argD) > GetSize(D))