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16215 commits

Author SHA1 Message Date
Akash Levy
3a23e772dd
Merge branch 'YosysHQ:main' into main 2025-05-24 12:11:52 -07:00
github-actions[bot]
209df95fb9 Bump version 2025-05-24 00:23:33 +00:00
Emil J
18abf2d4f7
Merge pull request #5138 from YosysHQ/emil/libcache-verbose
libcache: add -quiet and -verbose
2025-05-24 00:05:46 +02:00
Emil J
4b8d42d22c
Merge pull request #5095 from YosysHQ/emil/one-bit-width
rtlil: enable single-bit vector wires
2025-05-23 15:55:45 +02:00
George Rennie
e05b21cfae
Merge pull request #5140 from garytwong/typo-fix
Fix typo ("exist" -> "exit").
2025-05-23 13:01:57 +01:00
Gary Wong
4f0cbf2ee6 Fix typo ("exist" -> "exit"). 2025-05-22 18:52:33 -06:00
github-actions[bot]
6c67b29bbb Bump version 2025-05-23 00:24:38 +00:00
Akash Levy
d520cb42cc
Merge branch 'YosysHQ:main' into main 2025-05-22 10:30:58 -07:00
George Rennie
6331f92d00
Merge pull request #5101 from georgerennie/george/opt_expr_shift_ovfl
opt_expr: fix shift optimization with overflowing shift amount
2025-05-22 15:16:19 +01:00
George Rennie
98eec36921 kernel: add comments to as_int family of methods 2025-05-22 15:12:13 +01:00
Emil J
4f33cc52db
Merge pull request #5137 from mikesinouye/assert
Allow reading of gzipped files when not in NDEBUG
2025-05-22 10:39:48 +02:00
mikesinouye
761dc6f62a
Allow reading of gzipped files when not in NDEBUG 2025-05-21 15:18:29 -07:00
Akash Levy
c0e3ffa2da
Merge branch 'YosysHQ:main' into main 2025-05-20 00:58:47 -07:00
github-actions[bot]
388955031f Bump version 2025-05-17 00:23:43 +00:00
KrystalDelusion
135320a58c
Merge pull request #5123 from cr1901/winstat-fix
Strip trailing slashes when checking for directories on Windows.
2025-05-17 09:33:18 +12:00
Akash Levy
93da16f973 Bump backward-cpp 2025-05-15 22:14:49 -07:00
William D. Jones
7d4d544001 Strip trailing slashes when checking for directories on Windows. 2025-05-15 18:36:43 -04:00
Akash Levy
3c7c004c31 Fix stuff 2025-05-15 15:27:12 -07:00
Akash Levy
3f94486a1c
Merge pull request #82 from donn/splitlarge
splitlarge: new pass to split wide arithmetic operators
2025-05-15 15:00:45 -07:00
Akash Levy
1f00bf0057 Bump yosys to latest 2025-05-15 14:44:26 -07:00
KrystalDelusion
4c72b0ecd8
Merge pull request #5116 from YosysHQ/krys/update_fst
Update fstlib
2025-05-16 09:22:52 +12:00
KrystalDelusion
3a5ce2df64
Merge pull request #5112 from YosysHQ/krys/on_shutdown
design.cc: Use on_shutdown method
2025-05-16 09:22:39 +12:00
KrystalDelusion
f7888c607b
Merge pull request #5089 from YosysHQ/krys/cutpoint_whole
cutpoint: Re-add whole module optimization
2025-05-16 09:22:28 +12:00
Mohamed Gaber
1d9fbb6143 misc: review feedback, remove MUL vestiges 2025-05-15 18:01:13 +03:00
Mohamed Gaber
46ba89059a splitlarge: new pass to split wide arithmetic operators
Adds a new pass, `splitlarge`, that recursively divides $add/$sub
cells into smaller cells until each cell's width doesn't exceed a
given max_width (128 by default.) An $add/$sub cell's width for
this purpose is defined as the higher of the widths of its two
inputs.

A test was written in Tcl for it, which tests this matrix:
- cell: $add/$sub
- b: unsigned, signed
- a: unsigned, signed

This is the first test for a Silimate pass in Tcl and thus
`run-test.sh` was modified to include it.
2025-05-15 17:45:08 +03:00
Emil J
3823157c25
Merge pull request #5080 from akashlevy/muldiv_c
Add `muldiv_c` peepopt
2025-05-15 11:03:25 +02:00
github-actions[bot]
ae47c49af5 Bump version 2025-05-15 00:22:59 +00:00
George Rennie
748600c167
small whitespace cleanup (#5119) 2025-05-14 15:18:57 +02:00
Akash Levy
20d637697b Fix commit to be preqorsor commit 2025-05-13 20:43:03 -07:00
Akash Levy
1990c1fac5 Reduce pass verbosity 2025-05-13 20:42:47 -07:00
Akash Levy
d308ecdbcf Fix warnings with block curly braces 2025-05-13 20:42:28 -07:00
Akash Levy
769aaa113c Get boolopt src attribution working for dress 2025-05-13 20:05:16 -07:00
Akash Levy
d6975c1d5f Fix src attr inheritance in opt_share 2025-05-13 20:05:16 -07:00
Akash Levy
2e030bfdfd Refactor bmuxmap attribute inheritance 2025-05-13 20:05:16 -07:00
Akash Levy
f97587db61 Fix fanout buffer src annotation and refactor naming 2025-05-13 20:05:16 -07:00
Akash Levy
55f7ebf921
Merge branch 'YosysHQ:main' into main 2025-05-13 20:03:28 -07:00
github-actions[bot]
e3ae7b1400 Bump version 2025-05-13 00:24:04 +00:00
Akash Levy
ccc2ba41f2
Merge branch 'YosysHQ:main' into main 2025-05-12 15:02:55 -07:00
KrystalDelusion
5268565410
Merge pull request #5108 from marzoul/adrien-uram
Create a single-port URAM mapping to support memories 2048 x 144b
2025-05-13 09:54:36 +12:00
KrystalDelusion
c590c0c12c
Merge pull request #5111 from YosysHQ/krys/config_python
Makefile: Conditional assignment of python exe
2025-05-13 09:54:26 +12:00
KrystalDelusion
05157b164e
Merge pull request #5113 from YosysHQ/krys/ast_asan
simplify.cc: Fix mem leak
2025-05-13 09:52:51 +12:00
Akash Levy
13e053fb11 Fixups 2025-05-12 14:49:37 -07:00
Emil J. Tywoniak
f73c6a9c9a write_verilog: don't dump single_bit_vector attribute 2025-05-12 13:36:25 +02:00
Emil J. Tywoniak
e5171d6aa1 verific: support single_bit_vector 2025-05-12 13:23:29 +02:00
Emil J. Tywoniak
5e72464a15 rtlil: enable single-bit vector wires 2025-05-12 13:23:29 +02:00
Akash Levy
8171f04cbf Add preliminary boolopt src attribution support 2025-05-12 02:30:36 -07:00
Krystine Sherwin
afd5bbc7fa
fstdata.cc: Fix last step
Includes test file for sanity checking simulation steps.
2025-05-12 13:18:19 +12:00
Krystine Sherwin
d0b9a0cb98
sim.cc: Move cycle check
Calling `throw dst_end_of_data_exception()` when the desired number of cycles has been reached means that the fst reader can't tidy up after itself and leads to memory leaks.
This doesn't happen when the `-stop` flag is used because the `Yosys::FstData` struct tracks the end time and skips the outer callback if the simulation has gone past the desired end time.
Move cycle checking into the inner callback along with the time checking means that the outer callback no longer needs to throw an exception in order to stop checking further values, while still allowing the fst reader to finish reading and deallocate memory.
2025-05-12 12:48:01 +12:00
Krystine Sherwin
cc402ee065
libs/fst: Update upstream
libfst is no longer included in gtkwave and instead has its own repo.  There has also been some refactoring, so the patches need to update to match, as does sim.cc.
2025-05-12 10:21:06 +12:00
Akash Levy
aeed1ddb74 Update from upstream 2025-05-11 15:16:52 -07:00