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Author	SHA1	Message	Date
Roland Coeurjoly	09b9aa83c9	Add YosysHQ/abc as a submodule located in abc	2024-05-08 00:32:18 +02:00
Miodrag Milanović	c9d87d5e7b	Merge pull request #4377 from jix/smtbmc-incremental-improvements ... smtbmc: Improvements for --incremental and .yw fixes	2024-05-07 21:35:10 +02:00
N. Engelhardt	8735107c60	Merge pull request #4321 from YosysHQ/fix_read_verilog_defaults ... read_verilog: Add missing defaults for flags	2024-05-07 21:11:42 +02:00
Krystine Sherwin	df95ea824b	read_verilog: Add missing defaults for flags ... Fix for YosysHQ/sby#103	2024-05-07 20:25:36 +02:00
Jannis Harder	a52088b6af	smtbmc: Improvements for --incremental and .yw fixes ... This extends the experimental incremental JSON API to allow arbitrary smtlib subexpressions, defining smtlib constants and to allow access of signals by their .yw path. It also fixes a bug during .yw writing where values would be re-emitted in later cycles if they have no newer defined value and a potential crash when using --track-assumes.	2024-05-07 17:57:37 +02:00
Miodrag Milanovic	71f2540cd8	docs conf.py change Release -> Version	2024-05-07 15:55:52 +02:00
Miodrag Milanovic	b4034a881e	Keep docs version in conf.py	2024-05-07 15:35:25 +02:00
Miodrag Milanović	90dd508156	Merge pull request #4372 from YosysHQ/krys/docs_version_number ... Docs: Set release to YOSYS_VER	2024-05-07 09:15:51 +02:00
Akash Levy	0e77a03359	Merge branch 'YosysHQ:main' into master	2024-05-06 21:11:06 -07:00
Akash Levy	89439199e8	Fix	2024-05-06 21:09:32 -07:00
Krystine Sherwin	6eb49ee9e8	Makefile: Export YOSYS_VER only for make docs	2024-05-07 10:23:22 +12:00
Emil J	68c7fc4c91	Merge pull request #4300 from YosysHQ/cellmatch ... cellmatch: New pass for picking out standard cells automatically	2024-05-06 15:12:37 +02:00
Akash Levy	261bc561fa	Allow for gzip magic in stat	2024-05-05 04:21:47 -07:00
Krystine Sherwin	fe27240b3a	Makefile: Export YOSYS_VER	2024-05-04 16:51:38 +12:00
Krystine Sherwin	bb0be8c7a2	Docs: Set release to YOSYS_VER ... If building from read the docs, and the current build is "latest", add `-dev` to the version string. Requires `YOSYS_VER` to be exported by .readthedocs.yaml.	2024-05-04 16:51:29 +12:00
github-actions[bot]	0f9ee20ea2	Bump version	2024-05-04 00:16:00 +00:00
Emil J. Tywoniak	44b0fdc2bf	bbox_derive: add assert and debug print	2024-05-03 20:43:01 +02:00
Emil J. Tywoniak	e8c58a5528	bbox_derive: fix unininitialized memory UB when run with no named args	2024-05-03 20:41:42 +02:00
Martin Povišer	4c000d3aba	Add new bbox_derive command for blackbox derivation	2024-05-03 20:39:11 +02:00
Emil J. Tywoniak	e939182e68	cellmatch: add comments	2024-05-03 16:42:41 +02:00
Martin Povišer	b143e5678f	cellmatch: Rename the special design to $cellmatch	2024-05-03 16:42:41 +02:00
Martin Povišer	913bc87c44	cellmatch: Add test	2024-05-03 16:42:41 +02:00
Martin Povišer	c0e68dcc4d	cellmatch: Add debug print	2024-05-03 16:42:41 +02:00
Martin Povišer	6a9858cdad	cellmatch: Delegate evaluation to ConstEval	2024-05-03 16:42:41 +02:00
Martin Povišer	86e1080f05	cellmatch: New pass	2024-05-03 16:42:41 +02:00
Emil J	2631c7e918	Merge pull request #4365 from widlarizer/techmap-chtype-test ... techmap: add dynamic cell type test	2024-05-03 16:25:42 +02:00
Emil J. Tywoniak	a833f05036	techmap: add dynamic cell type test	2024-05-03 13:53:49 +02:00
Martin Povišer	6ff4ecb2b4	techmap: Remove techmap_chtype from the result	2024-05-03 13:33:28 +02:00
Martin Povišer	fc82251105	techmap: Support dynamic cell types	2024-05-03 13:33:28 +02:00
Akash Levy	2a8575abb2	Update verific to O3 opt	2024-05-03 03:34:36 -07:00
Lofty	8cc9aa7fc6	intel_alm: drop quartus support	2024-05-03 11:32:33 +01:00
Akash Levy	bf8ab97890	Slim yosys	2024-05-03 03:29:42 -07:00
Akash Levy	cc5e893db8	Add noclean option to submod for speedup	2024-05-02 06:12:09 -07:00
Akash Levy	e62bc102ca	Update Verific	2024-05-01 05:43:32 -07:00
Akash Levy	fbf87b2b23	Update Makefile	2024-04-30 05:21:36 -07:00
Akash Levy	810a11b6bc	Fix introduced typo	2024-04-29 22:25:17 -07:00
Akash Levy	8c330c0e4b	Merge branch 'YosysHQ:main' into master	2024-04-29 22:22:47 -07:00
github-actions[bot]	dd2195543b	Bump version	2024-04-30 00:17:14 +00:00
Martin Povišer	640d6a5127	Merge pull request #4359 from georgerennie/aiger_parse_bug ... read_aiger: Fix incorrect read of binary Aiger without outputs	2024-04-29 15:15:43 +02:00
George Rennie	4e6deb53b6	read_aiger: Fix incorrect read of binary Aiger without outputs ... * Also makes all ascii parsing finish reading lines and adds a small test	2024-04-29 14:06:58 +01:00
Jason Wu	f1672b2f14	Update Makefile	2024-04-29 10:16:22 +08:00
Jason Wu	374cd3966d	export define marco to qtcreator.config	2024-04-29 10:04:34 +08:00
Akash Levy	45b723d6f3	Merge branch 'YosysHQ:main' into master	2024-04-25 06:24:57 -07:00
N. Engelhardt	34d9a7451e	Merge pull request #4333 from YosysHQ/fix_hierarchy_generate ... fix hierarchy -generate mode handling of cells	2024-04-25 09:56:24 +02:00
KrystalDelusion	c3ae33da33	Merge pull request #4285 from YosysHQ/typo_fixup ... Typo fixing	2024-04-25 09:54:48 +12:00
Krystine Sherwin	f2ebc3f7b1	github: Add template for documentation issues	2024-04-25 09:39:23 +12:00
Akash Levy	501b5040fa	Merge branch 'YosysHQ:main' into master	2024-04-24 14:20:30 -07:00
Martin Povišer	cd1fb8b157	Merge pull request #4350 from jix/read_rtlil_performance ... rtlil: Add packed `extract` implementation for `SigSpec`	2024-04-24 14:07:28 +02:00
Akash Levy	6d2ac299ba	Merge branch 'YosysHQ:main' into master	2024-04-23 18:15:46 -07:00
github-actions[bot]	cf02f86c28	Bump version	2024-04-24 00:16:06 +00:00