359 commits

Author	SHA1	Message	Date
Eddie Hung	5ce672d1c5	Merge remote-tracking branch 'origin/xaig' into xaig_dff	2019-06-17 12:14:55 -07:00
Eddie Hung	7250c57c5a	Re-enable &dc2	2019-06-17 10:28:51 -07:00
Eddie Hung	fb90d8c18c	Cleanup	2019-06-16 09:34:26 -07:00
Eddie Hung	3ed95dae8d	Cleanup	2019-06-15 22:48:16 -07:00
Eddie Hung	416312b9ed	abc9 to recover_init by default	2019-06-15 22:44:45 -07:00
Eddie Hung	2309459605	Do not treat $__ABC_FF_ as a user cell	2019-06-15 19:36:55 -07:00
Eddie Hung	cdfb634977	Cleanup	2019-06-15 18:18:56 -07:00
Eddie Hung	c2f3f116d0	Use $__ABC_FF_ instead of $_FF_	2019-06-15 18:16:14 -07:00
Eddie Hung	a76c8a7ffd	Fix initialisation of flops	2019-06-15 09:46:35 -07:00
Eddie Hung	ac18a76beb	Map to $_FF_ instead of $_DFF_P_ to prevent recursion issues	2019-06-15 09:34:48 -07:00
Eddie Hung	da487c4f31	For now, short $_DFF_[NP]_ from ff_map.v at re-integration	2019-06-15 09:08:18 -07:00
Eddie Hung	2d85725604	Get rid of compiler warnings	2019-06-14 13:07:56 -07:00
Eddie Hung	a632799d5b	Update abc9 -D doc	2019-06-14 12:29:46 -07:00
Eddie Hung	e391fc8e7b	Enable "abc9 -D <num>" for timing-driven synthesis	2019-06-14 12:28:01 -07:00
Eddie Hung	a48b5bfaa5	Further cleanup based on @daveshah1	2019-06-14 12:25:06 -07:00
Eddie Hung	751e640c1d	Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig	2019-06-14 10:29:16 -07:00
Eddie Hung	a5425a2f7e	Remove extra semicolon	2019-06-14 10:11:34 -07:00
David Shah	9566573054	ecp5: Add abc9 option ... Signed-off-by: David Shah <dave@ds0.me>	2019-06-14 17:15:02 +01:00
Eddie Hung	2c40b66785	Rip out all non FPGA stuff from abc9	2019-06-12 16:53:12 -07:00
Eddie Hung	b3faf0246d	Be more precise when connecting during ABC9 re-integration	2019-06-12 16:04:33 -07:00
Eddie Hung	2e7e73f483	Remove hacky wideports_split from abc9	2019-06-12 15:52:49 -07:00
Eddie Hung	d9974b85e7	Fix compile errors when #if 1 for debug	2019-06-12 15:47:39 -07:00
Eddie Hung	8bb67fa67c	Do not call abc9 if no outputs	2019-06-12 10:18:44 -07:00
Eddie Hung	14e870d4c4	More write_xaiger cleanup	2019-06-12 10:00:57 -07:00
Eddie Hung	b21d29598a	Consistency	2019-06-12 09:40:51 -07:00
Eddie Hung	afd620fd5f	Typo: wire delay is -W argument	2019-06-12 09:13:53 -07:00
Eddie Hung	2dffa4685b	Add "-W' wire delay arg to abc9, use from synth_xilinx	2019-06-11 17:10:47 -07:00
Eddie Hung	5a46a0b385	Fine tune aigerparse	2019-06-07 16:57:32 -07:00
Eddie Hung	295bd8d0bf	Remove dupe	2019-06-03 12:32:20 -07:00
Eddie Hung	eb08e71bd1	Merge branch 'xaig' into xc7mux	2019-05-31 13:03:03 -07:00
Eddie Hung	a379234f56	Throw out unused code inherited from abc	2019-05-31 12:50:11 -07:00
Eddie Hung	4a6b9af227	Fix spelling	2019-05-30 15:50:47 -07:00
Eddie Hung	a44fe3a632	Revert "Re-enable &dc2" ... This reverts commit 8c58c728a7.	2019-05-30 11:41:50 -07:00
Eddie Hung	0800846e73	Do not double count LUT1s	2019-05-30 11:32:14 -07:00
Eddie Hung	8c58c728a7	Re-enable &dc2	2019-05-30 00:42:41 -07:00
Eddie Hung	2560f92f29	Reduce -W to 160	2019-05-29 23:01:46 -07:00
Eddie Hung	854557814e	Erase all boxes before stitching	2019-05-29 19:17:36 -07:00
Eddie Hung	b955344ecd	Call &if with -W 250	2019-05-29 16:34:52 -07:00
Eddie Hung	ecaa7856e9	Add some debug to abc9	2019-05-29 15:21:41 -07:00
Eddie Hung	4a76b425cc	Misspell	2019-05-28 08:44:59 -07:00
Eddie Hung	89bd6b8504	If driver not found, use LUT2	2019-05-27 23:12:21 -07:00
Eddie Hung	4df37c77fd	Disconnect all ABC boxes too	2019-05-27 19:40:27 -07:00
Eddie Hung	75bd41eaeb	Parse without wideports	2019-05-27 12:22:05 -07:00
Eddie Hung	bf3b8d5e45	Remove mapped_mod when done	2019-05-27 12:19:21 -07:00
Eddie Hung	234156c01a	Instantiate cell type (from sym file) otherwise 'clean' warnings	2019-05-27 12:16:10 -07:00
Eddie Hung	03b289a851	Add 'cinput' and 'coutput' to symbols file for boxes	2019-05-27 11:38:52 -07:00
Eddie Hung	3981eba999	ABC9 to call &sweep	2019-05-26 11:31:35 -07:00
Eddie Hung	086b6560b4	Typo	2019-05-26 03:17:20 -07:00
Eddie Hung	823153e418	Combine ABC_COMMAND_LUT	2019-05-26 02:47:06 -07:00
Eddie Hung	32a4c10c0d	Fix "a" extension	2019-05-26 02:44:36 -07:00