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Code Activity
6596 commits 122 branches 59 tags 72 MiB
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2051 commits

Author SHA1 Message Date
Clifford Wolf
e7d1277a2c Add consolidation of init attributes to opt_clean, some opt_clean log fixes 2017-07-29 00:10:33 +02:00
Clifford Wolf
649bb9374f Add "opt_expr -fine" feature to remove neutral bits from reduce and logic operators 2017-07-26 18:28:55 +02:00
Clifford Wolf
b6bd12fade Add error for cell output ports that are connected to constants 2017-07-22 15:08:30 +02:00
Clifford Wolf
b3bc7068d1 Fix handling of empty cell port assignments (i.e. ignore them) 2017-07-21 19:32:31 +02:00
Clifford Wolf
c00d8a5b73 Add $alu to list of supported cells for "stat -width" 2017-07-14 11:32:49 +02:00
Salvador E. Tropea
ca23554528 Excluded $_TBUF_ from opt_merge pass 2017-07-03 13:21:20 -03:00
Clifford Wolf
0a02cdb93b Fix and_or_buffer optimization in opt_expr for signed operators 2017-07-01 16:05:26 +02:00
Clifford Wolf
0f217080cf Add "design -import" 2017-06-30 19:18:52 +02:00
Clifford Wolf
8952bd6f45 Add chtype command 2017-06-30 17:57:34 +02:00
Clifford Wolf
18c030a8c9 Add $tribuf to opt_merge blacklist 2017-06-30 17:44:44 +02:00
Clifford Wolf
155a80dfb7 Fix handling of init values in "abc -dff" and "abc -clk" 2017-06-20 15:32:23 +02:00
Clifford Wolf
f6421c83a2 Switched abc "clock domain not found" error to log_cmd_error() 2017-06-20 04:22:34 +02:00
Clifford Wolf
05df3dbee4 Add "setundef -anyseq" 2017-05-28 11:59:05 +02:00
Clifford Wolf
9ed4c9d710 Improve write_aiger handling of unconnected nets and constants 2017-05-28 11:31:35 +02:00
Clifford Wolf
fad52abf70 Add aliases for common sets of gate types to "abc -g" 2017-05-24 11:39:05 +02:00
Clifford Wolf
05cdd58c8d Add $_ANDNOT_ and $_ORNOT_ gates 2017-05-17 09:08:29 +02:00
Clifford Wolf
3bbac5c141 Fix equiv_simple, old behavior now available with "equiv_simple -short" 2017-04-28 18:57:53 +02:00
Larry Doolittle
2021ddecb3 Squelch trailing whitespace 2017-04-12 15:11:09 +02:00
Clifford Wolf
dee4ec1661 Fix gcc compiler warning 2017-04-05 11:21:06 +02:00
Clifford Wolf
180d704568 Disable opt_merge for $anyseq and $anyconst 2017-02-28 22:17:00 +01:00
Clifford Wolf
1a6c02a532 Add "chformal -assert2assume" and friends 2017-02-28 00:00:44 +01:00
Clifford Wolf
db7fc0e32d Add "chformal" pass 2017-02-27 13:25:28 +01:00
Clifford Wolf
5f1d0b1024 Add $live and $fair cell types, add support for s_eventually keyword 2017-02-25 10:36:39 +01:00
Clifford Wolf
cf25dc9ce7 Copy attributes to _TECHMAP_REPLACE_ cells 2017-02-16 12:28:42 +01:00
Clifford Wolf
69468d5a16 Do not fix port widths on any blackbox instances 2017-02-13 17:07:38 +01:00
Clifford Wolf
db7314bc02 Fix techmap for inout ports connected to inout ports 2017-02-13 16:55:25 +01:00
Clifford Wolf
76c4ee096b Do not eagerly fix port widths on parameterized cells 2017-02-12 17:42:57 +01:00
Clifford Wolf
95dae6d416 Fixed some "used uninitialized" warnings in opt_expr 2017-02-11 10:50:48 +01:00
Clifford Wolf
a5bfeb9e07 Add optimization of (a && 1'b1) and (a || 1'b0) 2017-02-11 10:05:00 +01:00
C-Elegans
94b272077d Fix issue #306, "Bug in opt -full" 
Add check for whether the high bit in the constant expression is greater
than the width of the variable, and optimizes that to a constant 1 or
0
 2017-02-10 10:38:02 -05:00
Clifford Wolf
e6cc67b46f Fix handling of init attributes with strange width 2017-02-09 16:06:58 +01:00
Clifford Wolf
3928482a3c Add $cover cell type and SVA cover() support 2017-02-04 14:14:26 +01:00
Clifford Wolf
8927e19b13 Update ABC scripts to use "&nf" instead of "map" 2017-02-01 11:15:20 +01:00
Clifford Wolf
ffbe8d41f3 Fix indenting and log messages in code merged from opt_compare_pr 2017-01-31 16:20:56 +01:00
Clifford Wolf
19a980277f Merge branch 'opt_compare_pr' of https://github.com/C-Elegans/yosys into C-Elegans-opt_compare_pr 2017-01-31 15:54:41 +01:00
Clifford Wolf
7481ba4750 Improve opt_rmdff support for $dlatch cells 2017-01-31 10:15:04 +01:00
C-Elegans
a94c3694d7 Refactor and generalize the comparision optimization 
Generalizes the optimization to:
a < C,
a >= C,
C > a,
C <= a
 2017-01-30 17:52:16 -05:00
Clifford Wolf
fe29869ec5 Add $ff and $_FF_ support to equiv_simple 2017-01-30 10:50:38 +01:00
Clifford Wolf
45e10c1c89 Be more conservative with merging large cells into FSMs 2017-01-26 09:19:28 +01:00
Clifford Wolf
49b8160488 Add warnings for quickly growing FSM table size in fsm_expand 2017-01-26 09:05:59 +01:00
C-Elegans
2fa0fd4a37 Do not use b.as_int() in calculation of bit set 2017-01-21 12:58:26 -05:00
C-Elegans
84f9cd0025 Optimize compares to powers of 2 
Remove opt_compare and put comparison pass in opt_expr

assuming a [7:0] is unsigned
a >= (1<<x) becomes |a[7:x]
a <  (1<<x) becomes !a[7:x]

Additionally:
a >= 0 becomes constant true,
a < 0 becomes constant false

delete opt_compare.cc
revert opt.cc to commit b7cfb7dbd (remove opt_compare step)
 2017-01-16 13:45:50 -05:00
Austin Seipp
6781543244 passes/hierarchy: delete some dead code 
Signed-off-by: Austin Seipp <aseipp@pobox.com>
 2017-01-15 16:39:12 -06:00
C-Elegans
943389cdd5 Fix issue #269, optimize signed compare with 0 
add opt_compare pass and add it to opt
for a < 0:
    if a is signed, replace with a[max_bit-1]
for a >= 0:
    if a is signed, replace with ~a[max_bit-1]
 2017-01-15 13:38:29 -05:00
Clifford Wolf
0cac95ea94 Added "check -initdrv" 2017-01-04 18:12:41 +01:00
Clifford Wolf
f0df7dd796 Added cell port resizing to hierarchy pass 2017-01-01 23:03:44 +01:00
Clifford Wolf
b1cdf772eb Added "design -reset-vlog" 2016-11-30 11:25:55 +01:00
Clifford Wolf
ac7a175a3c Improved equiv_purge log output 2016-11-29 13:30:35 +01:00
Clifford Wolf
e444e59963 Added wire start_offset and upto handling to splitnets cmd 2016-11-23 13:54:33 +01:00
Clifford Wolf
55785a96eb Improved ABC default scripts 2016-11-19 18:20:54 +01:00