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Code Activity
17998 commits 136 branches 69 tags 59 MiB
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137 commits

Author SHA1 Message Date
AdvaySingh1
144db54c4e Changed to inverse hashing for more flexibility 2026-02-17 11:53:06 -08:00
AdvaySingh1
f0de3ae8de Initial sat_clockgate pass pre speed optimization 2026-02-17 11:19:18 -08:00
AdvaySingh1
cc6605f8e2 Added passing on the args into the clockgate pass so there's an icg cell for the mapping 2026-02-17 10:49:18 -08:00
AdvaySingh1
2ab34262ec Added profiling info before and after sat_clockgate pass 2026-02-17 09:23:32 -08:00
AdvaySingh1
3567960671 Changed hashing from string to pair with vector and bool 2026-02-13 17:01:58 -08:00
AdvaySingh1
5ce8aada27 Added profiling for literal count 2026-02-13 16:34:15 -08:00
AdvaySingh1
3442bc3a85 Changed indexing to be based on the literal ID in EZSat and sorted to allow better hashing 2026-02-13 16:15:31 -08:00
AdvaySingh1
80fbdf7e6a Removed duplication of vectors and called clockgate pass post creating enable signals 2026-02-13 15:33:45 -08:00
AdvaySingh1
feffbbe32c Added initial impl based on OpenROAD 2026-02-12 16:12:50 -08:00
AdvaySingh1
514c01efd2 Added prune expressions list TODO 2026-02-12 12:14:25 -08:00
AdvaySingh1
745f17a34e Changed input_set_is_enable_exact to XOR Mitter 2026-02-12 11:10:10 -08:00
AdvaySingh1
532d1d45a8 Resolved adding SigBits from Q using static EXCLUDE_Q_FROM_ENABLE knob 2026-02-11 15:08:49 -08:00
AdvaySingh1
4ca4392e9b Simplied recursion in sat_clockgate pass 2026-02-11 14:56:46 -08:00
AdvaySingh1
dd3f2e370c Fixed naming for bfs_find_potential_enable_inputs 2026-02-11 12:31:13 -08:00
AdvaySingh1
5b384511f2 Added initial SatClockgateWorker 2026-02-11 11:02:15 -08:00
AdvaySingh1
b4cd82bacf Added initial printing of the clocks with dump_flipflops_to_file 2026-02-11 10:56:07 -08:00
AdvaySingh1
6ad01fa850 Added initial pass structure 2026-02-10 14:33:37 -08:00
AdvaySingh1
b53acb0ff0 Added pass in Makefile.inc 2026-02-10 14:33:17 -08:00
AdvaySingh1
b4ef420c3f Added inital SAT based clock gating file 2026-02-10 14:02:15 -08:00
Akash Levy
ee46f498e1
Update negopt.cc 2026-02-07 17:54:16 -08:00
tondapusili
6bb43f109c fixed edge cases in negopt passes, fixed cell naming inconsistencies 2026-02-06 16:38:55 -08:00
tondapusili
d592f312ab mux_push implementation 2026-02-05 16:49:59 -08:00
tondapusili
643427d9c9 Add negopt pass with comprehensive pattern matching 
This commit introduces the negopt pass with pre/post optimization modes
for handling negation patterns in arithmetic circuits.

Pre-optimization patterns (expose for tree balancing):
- manual2sub: (a + ~b) + 1 → a - b
- sub2neg: a - b → a + (-b)
- negexpand: -(a + b) → (-a) + (-b) [with output width fix]
- negneg: -(-a) → a
- negmux: -(s ? a : b) → s ? (-a) : (-b)

Post-optimization patterns (cleanup/rebuild):
- negrebuild: (-a) + (-b) → -(a + b)
- muxneg: s ? (-a) : (-b) → -(s ? a : b)
- neg2sub: a + (-b) → a - b

All patterns use nusers() for fanout checking (standard Yosys style).
Comprehensive test coverage with positive/negative cases and formal
verification via equiv_opt.
 2026-02-03 17:21:21 -08:00
Akash Levy
4e937450b4
Merge pull request #97 from Silimate/reg-rename 
Bug fix for reg_rename pass
 2026-01-28 19:08:26 -08:00
Stan Lee
c0a1529eb8 reduce verbosity 2026-01-28 18:05:21 -08:00
Akash Levy
e8d27892f0
Merge pull request #96 from Silimate/fanoutbuf_src_attr 
Changed fanoutbuf.cc to include src attributes on buffers connected t…
 2026-01-28 17:50:46 -08:00
Stan Lee
04faedd131 syntax err 2026-01-28 17:40:57 -08:00
Stan Lee
dfef18010d shorter lines 2026-01-28 17:20:19 -08:00
Stan Lee
932c4452b5 better working implementation 2026-01-28 17:00:46 -08:00
AdvaySingh1
3ce57442de Changed fanoutbuf.cc to include src attributes on buffers connected to input and output wires 2026-01-28 15:33:13 -08:00
Stan Lee
a52689a1fa
Merge branch 'main' into main 2026-01-21 15:46:06 -08:00
Stan Lee
f026cebaf6 address comments 2026-01-21 15:16:45 -08:00
Akash Levy
947139aca1 Remove opt_balance_tree from silimate (now in opt) 2026-01-21 15:15:21 -08:00
Stan Lee
f14eb4a7bb only check reg cells 2026-01-21 15:13:55 -08:00
Stan Lee
269b70c0f9 compiles 2026-01-21 12:32:38 -08:00
Stan Lee
0018037c16 minor changes 2026-01-21 12:25:28 -08:00
Stan Lee
e824c8e0d6 ready for review 2026-01-21 09:00:46 -08:00
Stan Lee
d2e8f9b8a8 first round fixes 2026-01-20 21:45:13 -08:00
Stan Lee
60a81a2676 reg rename pass reads from vcd for original widths 2026-01-20 15:35:13 -08:00
Stan Lee
a5106da733 line reduction 2026-01-20 11:56:57 -08:00
Stan Lee
0ea4bb8a2d comment 2026-01-20 11:55:54 -08:00
Stan Lee
80364c608e significantly cleaner 2026-01-20 11:29:56 -08:00
Stan Lee
c471014878 slightly cleaner 2026-01-19 12:58:36 -08:00
Stan Lee
6303eed1b4 works hierarchy 2026-01-19 12:22:22 -08:00
Stan Lee
186fc15f8f passes simple test 2026-01-19 12:10:48 -08:00
Stan Lee
e678e2a0c3 every step except wire connecting 2026-01-19 11:20:11 -08:00
Stan Lee
15026033a3 annotate original register width 2026-01-19 11:19:41 -08:00
Stan Lee
4a1af73ec0 activity pass and a vcd writer bug fix 2026-01-16 16:32:04 -08:00
Akash Levy
33ddae41c3 Remove lut2bmux from silimate after upstreaming 2026-01-14 20:24:26 -08:00
Mohamed Gaber
083be40a8b
chore: switch out json11 for nlohmann json in read_liberty2json 2025-12-31 12:10:35 +02:00