Stan Lee
0ea4bb8a2d
comment
2026-01-20 11:55:54 -08:00
Stan Lee
80364c608e
significantly cleaner
2026-01-20 11:29:56 -08:00
Stan Lee
c471014878
slightly cleaner
2026-01-19 12:58:36 -08:00
Stan Lee
6303eed1b4
works hierarchy
2026-01-19 12:22:22 -08:00
Stan Lee
186fc15f8f
passes simple test
2026-01-19 12:10:48 -08:00
Stan Lee
e678e2a0c3
every step except wire connecting
2026-01-19 11:20:11 -08:00
Stan Lee
15026033a3
annotate original register width
2026-01-19 11:19:41 -08:00
Stan Lee
4a1af73ec0
activity pass and a vcd writer bug fix
2026-01-16 16:32:04 -08:00
Akash Levy
a121255f47
Merge branch 'YosysHQ:main' into main
2026-01-13 11:28:34 -08:00
Emil J. Tywoniak
8e2038c419
Use digit separators for large decimal integers
2026-01-13 16:38:12 +01:00
Akash Levy
58192ad8a6
Merge branch 'YosysHQ:main' into main
2026-01-12 22:52:03 -08:00
Miodrag Milanović
51b210c93c
Merge pull request #5600 from YosysHQ/fix_musllinux
...
musllinux fix so wheels build can work
2026-01-13 07:08:04 +01:00
Emil J
cc25ccfcd7
Merge pull request #5559 from nataliakokoromyti/upstream-lut2bmux
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add lut2bmux
2026-01-12 16:09:13 +01:00
Miodrag Milanovic
b3b71df07c
musllinux fix so wheels build can work
2026-01-12 15:38:45 +01:00
Miodrag Milanović
72690062a1
Merge pull request #5599 from YosysHQ/musllinux_fix
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musllinux fix so wheels build can work
2026-01-12 14:00:00 +01:00
Emil J
f193dd0a28
Merge pull request #5594 from rocallahan/sdc-workaround
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Check for missing port in SDC code to work around compiler bug
2026-01-12 11:22:25 +01:00
Miodrag Milanovic
2b12b74121
musllinux fix so wheels build can work
2026-01-11 15:23:38 +01:00
Robert O'Callahan
37347aacb2
Check for missing port in SDC code
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I am getting weird crashes on `main` in `tests/sdc/alu_sub.ys` which I traced to a null `Wire*`
in `SdcObjects::constrained_ports`. The null `Wire*` is being set in the `SdcObjects`
constructor. I don't understand what's going on here, so I added this check to detect the
missing wire early ... and that made the crash go away. Compiler bug maybe? I have
`Debian clang version 19.1.7 (3+build5)`, default build configuration.
Anyway this code seems fine to have.
2026-01-10 04:00:17 +00:00
KrystalDelusion
cc3d569ade
Merge pull request #5591 from YosysHQ/krys/clean_empty_switch
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Improve handling of empty switches
2026-01-09 11:52:27 +13:00
Robert O'Callahan
8da919587d
Parallelize opt_merge.
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I'm not sure why but this is actually faster than existing `opt_merge` even with
YOSYS_MAX_THREADS=1, for the jpeg synthesis test. 16.0s before, 15.5s after for
end-to-end synthesis.
2026-01-08 04:21:39 +00:00
Akash Levy
e332ba807d
Merge branch 'YosysHQ:main' into main
2026-01-07 12:40:39 -08:00
Krystine Sherwin
c0e29ef57c
proc_clean: Removing an empty full_case is doing something
2026-01-07 13:10:32 +13:00
Emil J
0ab967b036
Merge pull request #5564 from rocallahan/pass-fuzz
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Add support for fuzz-test comparison of two passes intended to give identical RTLIL results
2026-01-06 20:07:31 +01:00
Emil J
5c630a366d
Merge pull request #5555 from rocallahan/defer-redirects
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Defer redirecting cell outputs when merging cells in `opt_merge` untill after we've done a full pass over the cells.
2026-01-06 18:48:16 +01:00
Robert O'Callahan
042ec1cf60
Defer redirecting cell outputs when merging cells in opt_merge until after we've done a full pass over the cells.
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This avoids changing `assign_map` and `initvals`, which are inputs to the hash function for `known_cells`,
while `known_cells` exists. Changing the hash function for a hashtable while it exists leads to
confusing behavior. That also means the exact behavior of `opt_merge` cannot be reproduced by a
parallel implementation.
2026-01-06 16:21:48 +00:00
Natalia
11b0e7ad92
add lut2bmux
2026-01-06 14:48:16 +01:00
Mohamed Gaber
083be40a8b
chore: switch out json11 for nlohmann json in read_liberty2json
2025-12-31 12:10:35 +02:00
Akash Levy
8af276f106
Try again
2025-12-25 05:34:32 -05:00
Akash Levy
a1c26a9da5
Yosys abc smallfix
2025-12-25 05:32:50 -05:00
Akash Levy
1941e8f042
Bump yosys and abc to latest
2025-12-25 03:46:16 -05:00
Miodrag Milanović
aa9991d3ee
Merge pull request #5571 from YosysHQ/micko/warning
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remove unused variable
2025-12-23 16:32:10 +01:00
Miodrag Milanovic
4bc4e4eb41
remove unused variable
2025-12-23 15:47:35 +01:00
Miodrag Milanović
09f9e0e8d1
Merge pull request #5568 from rocallahan/abc-spawn-errno
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Print `errno` to help diagnose failure to spawn ABC
2025-12-23 08:09:14 +01:00
Robert O'Callahan
0e61f57458
Print errno to help diagnose failure to spawn ABC
2025-12-22 21:58:15 +00:00
N. Engelhardt
d5b38af4a7
Merge pull request #5550 from YosysHQ/nak/dont_merge_properties
2025-12-22 16:54:43 +01:00
Robert O'Callahan
48cdb499f2
Remove IdString::id_string().
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This was needed for the short time when `ID()` could return a value of `StaticIdString`.
That is no longer a problem.
2025-12-22 01:57:30 +00:00
Robert O'Callahan
46cb05c471
Pass IdString by value instead of by const reference.
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When IdString refcounting was expensive, it made sense to pass it by const reference
instead of by value, to avoid refcount churn. Now that IdString is not refcounted,
it's slightly more efficient to pass it by value.
2025-12-22 01:52:59 +00:00
Robert O'Callahan
914e14946d
Implement design_equal command
2025-12-21 21:47:40 +00:00
Akash Levy
abd485fa49
Bump Yosys to latest
2025-12-17 21:06:17 -08:00
N. Engelhardt
45d654e2d7
avoid merging formal properties
2025-12-17 20:25:24 +01:00
Krystine Sherwin
9d3d8bf502
Switch posix_spawn to posix_spawnp
2025-12-15 09:40:04 +13:00
Emil J
f003eca615
Merge pull request #5526 from YosysHQ/emil/fix-cellaigs-function-arg-eval-order
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cellaigs: fix function argument evaluation order
2025-12-12 10:00:09 +01:00
Akash Levy
16e4073225
Add configurable thread count in abc
2025-12-05 22:28:09 -08:00
Akash Levy
b3e669c2f3
Ok actually done now
2025-12-05 20:25:56 -08:00
Akash Levy
2aeada6980
Bump Yosys to latest
2025-12-05 20:05:16 -08:00
Robert O'Callahan
638e904f91
Remove cover() coverage tracking
2025-12-04 16:27:13 +01:00
Mohamed Gaber
1a561f42fa
read_liberty2json: propagate src attribute
2025-12-02 15:47:33 +02:00
Akash Levy
c2d8a4e43f
Merge branch 'YosysHQ:main' into main
2025-12-01 23:54:18 -05:00
Krystine Sherwin
9ec361beab
test_cell.cc: Generate .aag for all compatible cells
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Skips (with warning) on cells that didn't convert to avoid `write_aiger` from raising an error.
2025-12-02 14:03:36 +13:00
Emil J
9871e9b17e
Merge pull request #5496 from YosysHQ/emil/liberty-flop-loops
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read_liberty: support loopy retention cells
2025-12-01 22:50:20 +01:00
