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1963 commits

Author SHA1 Message Date
whitequark
0b09a347dc proc_prune: fix handling of exactly identical assigns. 
Before this commit, in a process like:
   process $proc$bug.v:8$3
     assign $foo \bar
     switch \sel
       case 1'1
         assign $foo 1'1
         assign $foo 1'1
       case
         assign $foo 1'0
     end
   end
both of the "assign $foo 1'1" would incorrectly be removed.

Fixes #1243.
 2019-08-08 05:32:35 +00:00
Eddie Hung
58e512ab70 Add comment 2019-08-07 09:54:27 -07:00
Eddie Hung
f20acbc813 Revert "Add TODO" 
This reverts commit 6068a6bf0d91e3ab9a5eaa33894a816f1560f99a.
 2019-08-07 09:54:27 -07:00
Eddie Hung
789585a744 Add TODO 2019-08-07 09:54:27 -07:00
Eddie Hung
8a8c1d7857 Compute box_lookup just once 2019-08-07 09:54:27 -07:00
Clifford Wolf
e9a756aa7a
Merge pull request #1213 from YosysHQ/eddie/wreduce_add 
wreduce/opt_expr: improve width reduction for $add and $sub cells
 2019-08-07 14:27:35 +02:00
Clifford Wolf
338f6765eb Tweak default gate costs, cleanup "stat -tech cmos" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-07 10:25:51 +02:00
Clifford Wolf
100c377451 Redesign of cell cost API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-07 01:12:14 +02:00
Eddie Hung
bfc7164af7 Move LSB-trimming functionality from wreduce to opt_expr 2019-08-06 15:25:50 -07:00
Eddie Hung
26cb3e7afc Merge remote-tracking branch 'origin/master' into eddie/wreduce_add 2019-08-06 14:50:00 -07:00
Clifford Wolf
023086bd46 Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-06 04:47:55 +02:00
whitequark
44a9dcbbbf
Merge pull request #1242 from jfng/fix-proc_prune-partial 
proc_prune: Promote partially redundant assignments.
 2019-08-03 07:08:41 +00:00
Clifford Wolf
0917a5cf72
Merge pull request #1238 from mmicko/vsbuild_fix 
Visual Studio build fix
 2019-08-02 17:07:39 +02:00
Miodrag Milanovic
28b7053a01 Fix formatting for msys2 mingw build using GetSize 2019-08-01 17:27:34 +02:00
Jean-François Nguyen
320bf2fde5 proc_prune: Promote partially redundant assignments. 2019-08-01 13:09:55 +02:00
Miodrag Milanovic
35d28de478 Visual Studio build fix 2019-07-31 09:10:24 +02:00
Clifford Wolf
c6d8692c97 Add "stat -tech cmos" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-07-20 15:06:28 +02:00
Eddie Hung
09beeee38a Try and fix again 2019-07-19 14:40:57 -07:00
Eddie Hung
cb0fd05215 Do not access beyond bounds 2019-07-19 13:58:50 -07:00
Eddie Hung
3a87dc3524 Wrap A and B in sigmap 2019-07-19 13:23:07 -07:00
Eddie Hung
31b0002e8c Remove "top" from message 2019-07-19 13:20:45 -07:00
Eddie Hung
bcd8027182 Also optimise MSB of $sub 2019-07-19 13:11:48 -07:00
Eddie Hung
fc0e36d1c0 wreduce for $sub 2019-07-19 12:50:21 -07:00
Eddie Hung
5939b5d636
Merge pull request #1188 from YosysHQ/eddie/abc9_push_inverters 
abc9: push inverters driving box inputs (comb outputs) through $lut soft logic
 2019-07-16 08:53:47 -07:00
Eddie Hung
ba8ccbdea8
Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix 
abc9/ice40: encapsulate SB_CARRY+SB_LUT4 into one box
 2019-07-16 08:52:14 -07:00
Miodrag Milanovic
2b469e82a7 Fix check logic in extract_fa 2019-07-16 10:35:18 +02:00
Clifford Wolf
2a7198db51
Merge pull request #1189 from YosysHQ/eddie/fix1151 
Error out if enable > dbits in memory_bram file
 2019-07-15 20:06:35 +02:00
Clifford Wolf
2c5c53e4c1
Merge pull request #1190 from YosysHQ/eddie/fix_1099 
extract_fa to return nothing more gracefully
 2019-07-15 20:05:56 +02:00
whitequark
2de7e92bb8 opt_lut: make less chatty. 2019-07-13 16:49:56 +00:00
Eddie Hung
9b91d815b5 If ConstEval fails do not log_abort() but return gracefully 2019-07-13 04:13:57 -07:00
Eddie Hung
ab3917d079 Error out if enable > dbits 2019-07-13 03:39:23 -07:00
Eddie Hung
fb062c3426 Add comment 2019-07-13 00:52:21 -07:00
Eddie Hung
e9bdc86c0e duplicate -> clone 2019-07-12 19:33:02 -07:00
Eddie Hung
be0cb7f4b8 More cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
7d583f9e57 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
83f23a24a8 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
1adbfb5533 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
39a7c7c54c More cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
91c07be196 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
399e1ec870 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
58dbb28fd3 Cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
7dc15bdd2d Do not double count cells in abc 2019-07-12 08:22:26 -07:00
Eddie Hung
c0abd18799 Enable &mfs for abc9, even if it only currently works for ice40 2019-07-11 08:49:06 -07:00
Clifford Wolf
fd3d5cefad
Merge pull request #1179 from whitequark/attrmap-proc 
attrmap: also consider process, switch and case attributes
 2019-07-11 07:23:28 +02:00
whitequark
ea447220da attrmap: also consider process, switch and case attributes. 2019-07-10 12:30:53 +00:00
Clifford Wolf
c66b4b9131
Merge pull request #1177 from YosysHQ/clifford/async 
Fix clk2fflogic adff reset semantic to negative hold time on reset
 2019-07-10 08:48:20 +02:00
Clifford Wolf
cae26bf330
Merge pull request #1174 from YosysHQ/eddie/fix1173 
Increment _TECHMAP_BITS_CONNMAP_ by one since counting from zero
 2019-07-09 22:59:51 +02:00
Clifford Wolf
9546ccdbd3 Fix tests/various/async FFL test 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-07-09 22:44:39 +02:00
Eddie Hung
c2db70f41e Increment _TECHMAP_BITS_CONNMAP_ by one since counting from zero 2019-07-09 12:14:00 -07:00
Eddie Hung
713337255e
Revert "Add "synth -keepdc" option" 2019-07-09 10:14:23 -07:00