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More cleanup
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@ -30,8 +30,7 @@
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"&st; &if -g -K 6; &synch2; &if {W} -v; &save; &load; "\
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"&mfs; &ps -l"
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#else
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#define ABC_COMMAND_LUT "&st; &scorr; &sweep; &dc2; &st; &dch -f; &ps; &if {W} {D} -v; &mfs -b; &ps -l"
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//#define ABC_COMMAND_LUT "&st; &scorr; &sweep; &dc2; &st; &put -v; dch -f; if {W} {D} -vo; mfs2; &get -vm; &ps -l"
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#define ABC_COMMAND_LUT "&st; &scorr; &sweep; &dc2; &st; &dch -f; &ps; &if {W} {D} -v; &mfs; &ps -l"
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#endif
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@ -756,16 +755,11 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
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RTLIL::SigBit a_bit = not_cell->getPort("\\A");
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RTLIL::SigBit y_bit = not_cell->getPort("\\Y");
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RTLIL::Const driver_mask;
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RTLIL::Wire *orig_a_bit_wire = a_bit.wire;
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decltype(bit2sinks)::const_iterator jt;
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a_bit.wire = module->wires_.at(remap_name(a_bit.wire->name));
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y_bit.wire = module->wires_.at(remap_name(y_bit.wire->name));
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if (orig_a_bit_wire->port_output)
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goto duplicate_lut;
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jt = bit2sinks.find(a_bit);
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auto jt = bit2sinks.find(a_bit);
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if (jt == bit2sinks.end())
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goto duplicate_lut;
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