Lofty
0bffb625c3
analogdevices: update T40LP timings
2026-01-05 14:45:54 +00:00
Lofty
c6d48eb1e1
analogdevices: update T16FFC timings
2026-01-05 10:27:46 +00:00
Lofty
ac27990a71
synth_analogdevices: update timing model and tests
2026-01-05 07:56:01 +00:00
Lofty
d14f8a13f6
analogdevices: double LUT RAM cost
2026-01-05 07:56:00 +00:00
Lofty
cabf44824f
analogdevices: ignore $assert cells
2026-01-05 07:56:00 +00:00
Krystine Sherwin
5acd0674fb
analogdevices: Extra tests
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`mem_gen.py` based on quicklogic tests.
Remove BUFG from `lutram.ys`.
Extra `sync_ram_sp` models in `arch/common/blockram.v`.
Add analogdevices to main makefile tests.
Not all the other tests are passing, but that's fine for now.
2026-01-05 07:56:00 +00:00
Krystine Sherwin
3104892f00
analogdevices: Fixing up bram
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Tested all the accepted configurations in eXpreso, disabling the RBRAM2 configs that fail to place, and increasing the cost for the double site TDP memories.
2026-01-05 07:56:00 +00:00
Krystine Sherwin
0940fea017
analogdevices: Add BRAM options
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Enable `-force-params`, and tidy up lutram mapping too.
2026-01-05 07:56:00 +00:00
Krystine Sherwin
e188142aeb
memory_libmap: Add -force-params
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Reduce complexity for adi brams by unconditionally providing the WIDTH and ABITS parameters.
2026-01-05 07:56:00 +00:00
Lofty
bde78cb277
analogdevices: LUT RAM only on positive edge
2026-01-05 07:56:00 +00:00
Lofty
5e763e70db
analogdevices: DSP tweaks
2026-01-05 07:56:00 +00:00
Lofty
8b285f21fb
analogdevices: DSP inference
2026-01-05 07:56:00 +00:00
Lofty
2fdbbeef76
analogdevices: remove cells_xtra
2026-01-05 07:56:00 +00:00
Lofty
35f747e0e5
analogdevices: timings for t40lp
2026-01-05 07:56:00 +00:00
Lofty
24746efe1c
analogdevices: use single tech param
2026-01-05 07:56:00 +00:00
Lofty
3c54f64378
analogdevices: expreso does not care about clock buffers
2026-01-05 07:56:00 +00:00
Lofty
09510815d9
analogdevices: prepare for t40lp timings
2026-01-05 07:56:00 +00:00
Krystine Sherwin
3a3b1952ab
analogdevices: Adding RBRAM2 and -tech
2026-01-05 07:56:00 +00:00
Krystine Sherwin
a7370e671a
analogdevices: (some) Native BRAM
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Specifically, the SDP configurations for RBRAM (ignoring 2048x09 because it makes the memlib format unhappy).
Drop the unused defines from the synth pass.
Remove comments from the lutram files referencing xilinx.
2026-01-05 07:56:00 +00:00
Krystine Sherwin
2b2fbad80e
analogdevices: Update lutram.ys test
2026-01-05 07:56:00 +00:00
Krystine Sherwin
02dd7a7624
analogdevices: Native LUTRAM primitives
2026-01-05 07:56:00 +00:00
Lofty
1deeb8d026
analogdevices: LUTRAM config
2026-01-05 07:56:00 +00:00
Lofty
68409b6d8d
analogdevices: update timing model
2026-01-05 07:56:00 +00:00
Lofty
d3cf602c1d
I thought I removed this...
2026-01-05 07:56:00 +00:00
Lofty
258f091655
analogdevices: user retargeting
2026-01-05 07:56:00 +00:00
Lofty
64c722d7a4
analogdevices: more housekeeping
2026-01-05 07:56:00 +00:00
Lofty
7c8d7e4470
analogdevices: remove some extra cells!
2026-01-05 07:56:00 +00:00
Lofty
b8960b0980
test suite
2026-01-05 07:56:00 +00:00
Lofty
0aae850e48
synth_analogdevices: remove scopeinfo cells
2026-01-05 07:56:00 +00:00
Lofty
9c8b3a6836
Create synth_analogdevices
2026-01-05 07:56:00 +00:00
github-actions[bot]
8101c87fab
Bump version
2025-12-31 00:27:01 +00:00
Miodrag Milanović
582969b236
Merge pull request #5575 from YosysHQ/update_abc
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Update ABC as per 2025-12-29
2025-12-30 10:00:49 +01:00
Miodrag Milanovic
55af32024d
Update ABC as per 2025-12-29
2025-12-30 09:23:45 +01:00
github-actions[bot]
96549e5514
Bump version
2025-12-30 00:26:17 +00:00
Miodrag Milanović
d523c88c3c
Merge pull request #5573 from rocallahan/increase-timeout
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Increase test timeout to 10 seconds
2025-12-29 12:38:34 +01:00
Robert O'Callahan
99d7ab9c42
Increase test timeout to 10 seconds
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On my machine, this test regularly times out when doing "make -j" (which defaults to 128).
The high degree of parallelism seems to slow down the spwaning of ABC processes.
2025-12-29 04:35:05 +00:00
github-actions[bot]
17ca71e1ab
Bump version
2025-12-24 00:26:02 +00:00
Miodrag Milanović
aa9991d3ee
Merge pull request #5571 from YosysHQ/micko/warning
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remove unused variable
2025-12-23 16:32:10 +01:00
Miodrag Milanovic
4bc4e4eb41
remove unused variable
2025-12-23 15:47:35 +01:00
Miodrag Milanović
09f9e0e8d1
Merge pull request #5568 from rocallahan/abc-spawn-errno
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Print `errno` to help diagnose failure to spawn ABC
2025-12-23 08:09:14 +01:00
github-actions[bot]
31f355c599
Bump version
2025-12-23 00:26:12 +00:00
Robert O'Callahan
0e61f57458
Print errno to help diagnose failure to spawn ABC
2025-12-22 21:58:15 +00:00
N. Engelhardt
d5b38af4a7
Merge pull request #5550 from YosysHQ/nak/dont_merge_properties
2025-12-22 16:54:43 +01:00
Miodrag Milanović
650c18a2a2
Merge pull request #5565 from rocallahan/idstring-by-value
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Pass `IdString` by value instead of by const reference
2025-12-22 14:51:30 +01:00
Miodrag Milanović
580b57c772
Merge pull request #5566 from YosysHQ/update_abc
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Update ABC as per 2025-12-22
2025-12-22 13:19:28 +01:00
Miodrag Milanovic
13030e43d4
Update ABC as per 2025-12-22
2025-12-22 12:31:58 +01:00
Robert O'Callahan
48cdb499f2
Remove IdString::id_string().
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This was needed for the short time when `ID()` could return a value of `StaticIdString`.
That is no longer a problem.
2025-12-22 01:57:30 +00:00
Robert O'Callahan
46cb05c471
Pass IdString by value instead of by const reference.
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When IdString refcounting was expensive, it made sense to pass it by const reference
instead of by value, to avoid refcount churn. Now that IdString is not refcounted,
it's slightly more efficient to pass it by value.
2025-12-22 01:52:59 +00:00
github-actions[bot]
64a933d77b
Bump version
2025-12-18 00:22:53 +00:00
N. Engelhardt
45d654e2d7
avoid merging formal properties
2025-12-17 20:25:24 +01:00
