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1616 commits

Author SHA1 Message Date
Jannis Harder
4f3d1be96a
Merge pull request #3767 from YosysHQ/krys/yw_fix
Assign wires an smtoffset
2023-05-22 16:10:55 +02:00
Jannis Harder
5fb1223861
Merge pull request #3733 from AdamHillier/aiger-inputs
Add outputs before inputs to the sigmap in the AIGER backend.
2023-05-22 16:09:15 +02:00
Krystine Sherwin
18b44a1e84
yosys-witness: add append option to yw2yw
Can now append a user defined number of steps to input traces when joining.
If the number of steps is +ve, inputs are all set to 0.
If -ve then steps are skipped.
If all of steps are skipped (including init step) then the input trace will not be copied.
If more than one input trace is provided, the append option will need to be provided the same number of times as there are input traces.
2023-05-22 11:44:19 +12:00
Krystine Sherwin
8c9a0b51d4
yosys-witness concat yw trace files
Intended for use with SCY to combine sequential cover traces.
Arbitrary number of inputs, will load all and attempt to join them.  Each trace will be replayed one after the other, in the same order as the files are provided.
Mismatch in init_only fields seems to work fine, with values in subsequent traces being assigned in the initial only if they weren't previously defined.
Uncertain if a mismatch in non init_only fields will cause problems.
Fixes WitnessSig.__eq__().
Adds helper functions to WitnessValues and ReadWitness classes.
2023-05-22 10:13:17 +12:00
Jannis Harder
e6f3914800 smt2: Use smt bv offset for $any*'s smtoffset
While not setting the smtoffset here was clearly a bug, I think using
`chunk.offset` only worked incidentally. The `smtoffset` is an offset
into the `smtname, smtid` pair (here `"", idcounter`) which corresponds
to the smt bitvector `stringf("%s#%d", get_id(module), idcounter)` which
contains all the chunks this loop is iterating over.

Thus using an incrementing `smtoffset` (like the `$ff`/`$dff` case above
already does) should be the correct fix.
2023-05-18 11:58:09 +02:00
Krystine Sherwin
52ad7a47f3
Assign wires an smtoffset
Wires weren't being assigned an smtoffset value so when generating a yosys witness trace it would also use an offset of 0.
Not sure if this has any other effects, but it fixes the bug I was having.
@jix could you take a look at this?
2023-05-18 10:37:55 +12:00
Benjamin Barzen
8611429237
ABC9: Cell Port Bug Patch (#3670)
* ABC9: RAMB36E1 Bug Patch

* Add simplified testcase

* Also fix xaiger writer for under-width output ports

* Remove old testcase

* Missing top-level input port

* Fix tabs

---------

Co-authored-by: Eddie Hung <eddie@fpgeh.com>
2023-04-22 16:24:36 -07:00
AdamHillier
3861cc31f0 Add outputs before inputs to the sigmap in the AIGER backend. 2023-04-19 11:00:51 +00:00
Catherine
4bb173e256 yosys-smtbmc: support -h/--help (and exit with code 0). 2023-02-27 20:31:00 +00:00
Jannis Harder
160eeab2bb verilog_backend: Do not run bwmuxmap even if in expr mode
While bwmuxmap generates equivalent logic, it doesn't propagate x bits
in the same way, which can be relevant when writing verilog.
2023-02-13 14:00:38 +01:00
Aki Van Ness
a90f940615 backends/firrtl: Ensure modInstance is valid
This should fix #3648 where when calling `emit_elaborated_extmodules` it
checks to see if a module is a black-box, however there was no
validation that the cell type was actually known, and it just always
assumed that we would get a valid instance, causing a segfault.
2023-02-03 08:27:52 -05:00
Jannis Harder
0f2cb80a26
Merge pull request #3655 from jix/smt2_fix_b_op_width
smt2: Fix operation width computation for boolean producing cells
2023-02-01 18:06:59 +01:00
Jannis Harder
5e82638408 smt2: Fix operation width computation for boolean producing cells
The output width for the boolean value should not influence the
operation width. The previous incorrect width extension would still
produce correct results, but could produce invalid smt2 output for
reduction operators when the output width was larger than the width of
the vector to which the reduction was applied.

This fixes #3654
2023-02-01 12:34:35 +01:00
Jannis Harder
b08a880704 backends/rtlil: Do not shorten a value with z bits to 'x 2023-01-29 14:02:25 +01:00
Miodrag Milanović
8180cc4325
Merge pull request #3624 from jix/sim_yw
Changes to support SBY trace generation with the sim command
2023-01-23 16:55:17 +01:00
Miodrag Milanovic
6574553189 Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
Jannis Harder
d6c7aa0e3d sim/formalff: Clock handling for yw cosim 2023-01-11 18:07:16 +01:00
Jannis Harder
7ddec5093f sim: Improvements and fixes for yw cosim
* Fixed $cover handling
  * Improved sparse memory handling when writing traces
  * JSON summary output
2023-01-11 18:07:16 +01:00
Jannis Harder
636b9f2705 Support for BTOR witness to Yosys witness conversion 2023-01-11 18:07:16 +01:00
Jannis Harder
3e25e61778 aiger: Use new JSON code for writing aiger witness map files 2023-01-11 18:07:16 +01:00
Jannis Harder
673ad561b8 smt2: Treat bweqx as xnor
Without x-bits they are equivalent
2023-01-11 18:07:16 +01:00
Jannis Harder
62afe61779 smt2: Directly implement bwmux instead of using bwmuxmap 2023-01-11 18:07:16 +01:00
Jannis Harder
be752a20dc Add bwmuxmap pass 2022-11-30 18:50:53 +01:00
Jannis Harder
f2c531e65f verilog_backend: Do not run bmuxmap or demuxmap in -noexpr mode. 2022-11-30 18:24:35 +01:00
Jannis Harder
82b630a246 verilog_backend: Correctly sign extend output of signed $modfloor 2022-11-30 18:24:35 +01:00
Jannis Harder
5cb7d0fe9d verilog_backend: Add -noparallelcase option 2022-11-30 18:24:35 +01:00
Emil J
15d41041d8
Merge branch 'YosysHQ:master' into master 2022-11-08 22:02:23 +01:00
Emil J
6936394eed
Merge branch 'YosysHQ:master' into master 2022-10-20 19:36:03 +02:00
Emil Jiří Tywoniak
2ba435b6bc bugfix for mathsat counterexample vcd dump 2022-10-20 19:31:16 +02:00
Jannis Harder
96029400cb smtbmc: Do not assume skipped assertions when loading a witness trace
This is not valid when the prefix of a trace already violates
assertions. This can happen when the trace generating solver doesn't
look for a minimal length counterexample.
2022-10-20 13:49:47 +02:00
Emil J
8859d801c8
Temporal induction counterexample loop detection (#3504)
I have added an optional flag to smtbmc that causes failed temporal induction counterexample traces to be checked for duplicate states and reported to the user, since loops in the counterexample mean that increasing the induction depth won't help prove a design's safety properties.
2022-10-19 12:20:12 +02:00
Emil Jiří Tywoniak
083ca6ab06 bugfix 2022-10-18 22:58:54 +02:00
Jannis Harder
8838b1eaa4 smtbmc: Fix witness handling for k-induction failures
The "uninitialized" value is a _list_ of chunks that are part of the
initial state for the witness trace.
2022-10-18 19:51:36 +02:00
Jannis Harder
4d334fd3e3 smt2/smtbmc: Fix FF witness data for fine grained or multi chunk FFs
The witness metadata was missing fine grained FFs completely and for
coarse grained FFs where the output connection has multiple chunks it
lacked the offset of the chunk within the SMT expression. This fixes
both, the later by adding an "smtoffset" field to the metadata.
2022-10-12 19:48:36 +02:00
Emil Jiří Tywoniak
8d4000a9b7 include memory in state 2022-10-11 19:52:44 +02:00
Emil Jiří Tywoniak
0dbebea939 include memory in state 2022-10-11 19:48:16 +02:00
Aki Van Ness
7a73133c9f
backends: protobuf: removed protobuf backend 2022-10-10 10:41:11 -04:00
Emil Jiří Tywoniak
3e816e9922 experimental temporal induction counterexample loop detection 2022-10-09 18:24:43 +02:00
Jannis Harder
1d40f5e8fa smtbmc: Avoid unnecessary string copies when parsing solver output 2022-09-02 22:37:08 +02:00
KrystalDelusion
9465b2af95 Fitting help messages to 80 character width
Uses the regex below to search (using vscode):
	^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);

Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
2022-08-24 10:40:57 +12:00
Jannis Harder
5142fb3b5c write_aiger: Fix non-$_FF_ FFs
This broke while switching sby's formal flows to always use $_FF_'s.
2022-08-18 13:56:22 +02:00
Jannis Harder
66f761a8c5 smtbmc: Set step range for --yw and dont skip steps for --check-witness 2022-08-16 13:37:30 +02:00
Jannis Harder
b156fe903f yosys-witness: Add stats command 2022-08-16 13:37:30 +02:00
Jannis Harder
475267ac25 smtbmc: Add --check-witness mode
This verifies that the given constraints force an assertion failure.
This is useful to debug witness trace conversion (and minimization).
2022-08-16 13:37:30 +02:00
Jannis Harder
efd5b86eb9 aiger: Add yosys-witness support
Adds a new json based aiger map file and yosys-witness converters to us
this to convert between native and AIGER witness files.
2022-08-16 13:37:30 +02:00
Jannis Harder
f041e36c6e smtbmc: Add native json based witness format + smt2 backend support
This adds a native json based witness trace format. By having a common
format that includes everything we support, and providing a conversion
utility (yosys-witness) we no longer need to implement every format for
every tool that deals with witness traces, avoiding a quadratic
opportunity to introduce subtle bugs.

Included:

  * smt2: New yosys-smt2-witness info lines containing full hierarchical
    paths without lossy escaping.
  * yosys-smtbmc --dump-yw trace.yw: Dump results in the new format.
  * yosys-smtbmc --yw trace.yw: Read new format as constraints.
  * yosys-witness: New tool to convert witness formats.
    Currently this can only display traces in a human-readable-only
    format and do a passthrough read/write of the new format.
  * ywio.py: Small python lib for reading and writing the new format.
    Used by yosys-smtbmc and yosys-witness to avoid duplication.
2022-08-16 13:37:30 +02:00
Jannis Harder
96a1173598 btor: Support $anyinit cells 2022-08-16 13:37:30 +02:00
Jannis Harder
5893cae647 aiger: Support $anyinit cells 2022-08-16 13:37:30 +02:00
Jannis Harder
021c3c8da5 smt2: Support $anyinit cells 2022-08-16 13:37:30 +02:00
Jannis Harder
a5e1d3b997 formalff: Set new replaced_by_gclk attribute on removed dff's clks
This attribute can be used by formal backends to indicate which clocks
were mapped to the global clock. Update the btor and smt2 backend which
already handle clock inputs to understand this attribute.
2022-08-16 13:37:30 +02:00