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cxxrtl: WIP: adjust comb display cells to only fire on change

Naming and use of statics to be possibly revised.
This commit is contained in:
Charlotte 2023-06-28 11:51:30 +10:00 committed by Marcelina Kościelnicka
parent 7f7c61c9f0
commit 843ad9331b
8 changed files with 95 additions and 16 deletions

View file

@ -850,7 +850,7 @@ std::ostream &operator<<(std::ostream &os, const value_formatted<Bits> &vf)
while (!val.is_zero()) {
value<Bits> quotient;
val.divideWithRemainder(value<Bits>{10u}, quotient);
buf += '0' + val.template slice<3, 0>().val().template get<uint8_t>();
buf += '0' + val.template trunc<(Bits > 4 ? 4 : Bits)>().val().template get<uint8_t>();
val = quotient;
}
if (negative || vf.plus)

View file

@ -1217,8 +1217,18 @@ struct CxxrtlWorker {
// $print cell
} else if (cell->type == ID($print)) {
log_assert(!for_debug);
auto trg_enable = cell->getParam(ID::TRG_ENABLE).as_bool();
static int cell_counter = 0;
if (!trg_enable) {
++cell_counter;
f << indent << "static bool last_print_" << cell_counter << "_known = false;\n";
f << indent << "static value<1> last_print_" << cell_counter << "_en;\n";
f << indent << "static value<" << cell->getPort(ID::ARGS).size() << "> last_print_" << cell_counter << "_args;\n";
}
f << indent << "if (";
if (cell->getParam(ID::TRG_ENABLE).as_bool()) {
if (trg_enable) {
f << '(';
for (size_t i = 0; i < (size_t)cell->getParam(ID::TRG_WIDTH).as_int(); i++) {
RTLIL::SigBit trg_bit = cell->getPort(ID::TRG)[i];
@ -1235,6 +1245,17 @@ struct CxxrtlWorker {
f << mangle(trg_bit);
}
f << ") && ";
} else {
f << '(';
f << "!last_print_" << cell_counter << "_known || ";
f << '(';
f << "last_print_" << cell_counter << "_en != ";
dump_sigspec_rhs(cell->getPort(ID::EN));
f << " || last_print_" << cell_counter << "_args != ";
dump_sigspec_rhs(cell->getPort(ID::ARGS));
f << ')';
f << ") && ";
}
dump_sigspec_rhs(cell->getPort(ID::EN));
f << " == value<1>{1u}) {\n";
@ -1242,6 +1263,16 @@ struct CxxrtlWorker {
dump_print(cell);
dec_indent();
f << indent << "}\n";
if (!trg_enable) {
f << indent << "last_print_" << cell_counter << "_known = true;\n";
f << indent << "last_print_" << cell_counter << "_en = ";
dump_sigspec_rhs(cell->getPort(ID::EN));
f << ";\n";
f << indent << "last_print_" << cell_counter << "_args = ";
dump_sigspec_rhs(cell->getPort(ID::ARGS));
f << ";\n";
}
// Flip-flops
} else if (is_ff_cell(cell->type)) {
log_assert(!for_debug);