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9d0cdb8551 · Merge pull request #5901 from YosysHQ/test_cleanup · Updated 2026-05-20 10:55:28 +00:00

Branches

4eee3e9e4f · Cleanup. · Updated 2026-05-25 09:07:40 +00:00

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ed263d26cc · Fix Windows portability issues that break MSVC build. · Updated 2026-05-23 15:28:40 +00:00

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5a6568edbe · rtlil, patch: update signorm index and driver fields when committing Cell from Patch to Design · Updated 2026-05-22 23:09:26 +00:00

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849526491a · fixup! tests: signorm fix · Updated 2026-05-22 19:23:38 +00:00

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6039446e60 · Visual Studio build · Updated 2026-05-22 17:54:19 +00:00

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cf75a6ef45 · verific: Fix upto ranges · Updated 2026-05-20 21:46:56 +00:00

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04a1611346 · Tests. · Updated 2026-05-20 14:44:52 +00:00

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33a2a3a4fd · wip · Updated 2026-05-20 13:30:09 +00:00

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886d0a7043 · Merge branch 'main' into gus/sim-with-vcd-tuneup · Updated 2026-05-19 10:17:29 +00:00

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7186faa7e3 · verific: WIP mem index fixing · Updated 2026-05-19 08:49:59 +00:00

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71665b5b87 · Bump CI to use gcc-16 as latest compiler · Updated 2026-05-18 07:45:03 +00:00

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38c2806636 · Make sure to apply correct signedness to loop vars. · Updated 2026-05-13 14:52:07 +00:00

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7d3e56523b · Preserve param signedness across overrides. · Updated 2026-05-13 14:25:15 +00:00

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334dd7b80c · muxpack: reject slicing of predecessor Y ports in mux chain · Updated 2026-05-13 08:27:05 +00:00

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d55f4daae2 · Cleanup. · Updated 2026-05-12 15:06:57 +00:00

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d9faee0153 · Accumulate connect cells. · Updated 2026-05-12 12:47:49 +00:00

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b04aadfa44 · Add LogSink & LogMessage classes for a more robust sink solution. · Updated 2026-05-06 16:23:24 +00:00

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77b63be4d2 · Remove unstable san test for mac. · Updated 2026-05-06 11:44:10 +00:00

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343538becc · hierarchy interfaces: refactor · Updated 2026-05-05 17:05:00 +00:00

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a3740057e3 · bitpattern: add analysis effort limit, use in proc_rmdead · Updated 2026-05-04 21:09:21 +00:00

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