Pulse Contributors Code frequency Recent commits

2025-11-23 - 2026-02-23

Period: 3 months

1 day 3 days 1 week 1 month 3 months 6 months 1 year

Overview

0 active pull requests

4 active issues

0
Merged pull requests 0
Proposed pull requests 4
Closed issues 0
New issues

There has not been any commit activity in this period.

4 issues closed from 1 user

Closed #11 NLnet 2024-12-324 Create the fetch and i-cache logic. 2026-02-22 21:32:50 +00:00

Closed #12 NLnet 2024-12-324 Create the PowerISA decoder 2026-01-29 02:23:38 +00:00

Closed #10 NLnet 2024-12-324 Create the next-instruction logic 2025-12-17 07:55:08 +00:00

Closed #13 NLnet 2024-12-324 Create a model of the instruction fetch/decode control system, using procedural implementations of the most complex HDL modules where appropriate. 2025-12-17 07:55:08 +00:00

2 unresolved conversations

Open #8 NLnet 2024-12-324 Create a model of the whole rename/execute/retire control system, using procedural implementations of the most complex HDL modules where appropriate. 2026-02-23 19:39:17 +00:00

Open #15 NLnet 2024-12-324 memory system: main memory and IO devices 2026-02-23 19:39:17 +00:00