2026-03-24 - 2026-06-24
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1 pull request proposed by 1 user
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#27 WIP: add nlnet-2025-12-681 grant
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#8 NLnet 2024-12-324 Create a model of the whole rename/execute/retire control system, using procedural implementations of the most complex HDL modules where appropriate.
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#15 NLnet 2024-12-324 memory system: main memory and IO devices
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#2
NLnet 2024-12-324 Figure out how exactly we should represent HDL in Rocq